完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, W. B. | en_US |
dc.contributor.author | Shie, B. S. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.contributor.author | Hsu, K. C. | en_US |
dc.contributor.author | Chi, C. C. | en_US |
dc.date.accessioned | 2014-12-08T15:39:17Z | - |
dc.date.available | 2014-12-08T15:39:17Z | - |
dc.date.issued | 2010 | en_US |
dc.identifier.isbn | 978-1-4244-7419-6 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/26831 | - |
dc.description.abstract | High performance metal-gate/high-kappa/Ge n-MOSFETs are reached with low 73 Omega/sq sheet resistance (R(s)), 1.10 ideality factor, 0.95 nm EOT, small 106 mV/dec sub-threshold slope (SS), good 285 cm(2)/Vs high-field (1 MV/cm) mobility and low 37 mV Delta V(t) PBTI (85 degrees C, 1 hr). This is achieved by using 30-ns laser annealing that leads to 57% higher gate capacitance, better n(+)/p junction and 10X better I(ON)/I(OFF). | en_US |
dc.language.iso | en_US | en_US |
dc.title | Higher kappa Metal-Gate/High-kappa/Ge n-MOSFETs with < 1 nm EOT Using Laser Annealing | en_US |
dc.type | Article | en_US |
dc.identifier.journal | 2010 INTERNATIONAL ELECTRON DEVICES MEETING - TECHNICAL DIGEST | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000287997300109 | - |
顯示於類別: | 會議論文 |