Title: Universal switch blocks for three-dimensional FPGA design
Authors: Wu, GM
Shyu, M
Chang, YM
資訊工程學系
Department of Computer Science
Issue Date: 1-Feb-2004
Abstract: The authors consider the switch-block design problem for three-dimensional FPGAs. A three-dimensional switch block M with W terminals on each face is said to be universal if every set of nets satisfying the dimension constraint (i.e. the number of nets on each face of M is at most K) is simultaneously routable through M. A class of universal switch blocks for three-dimensional FPGAs is presented. Each of the switch blocks has 15 W switches and switch-block flexibility 5 (i.e. F-S=5). It is proved that no switch block with less than 15W switches can be universal. The proposed switch blocks are compared with others of the topology associated with those used in the Xilinx XC4000 FPGAs. Experimental results demonstrate that the proposed universal switch blocks improve routabilty at the chip level. Further, the decomposition property of a universal switch block provides a key insight into its layout implementation with a smaller silicon area.
URI: http://dx.doi.org/10.1049/ip-cds:20040228
http://hdl.handle.net/11536/27083
ISSN: 1350-2409
DOI: 10.1049/ip-cds:20040228
Journal: IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS
Volume: 151
Issue: 1
Begin Page: 49
End Page: 57
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