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dc.contributor.authorWang, JCen_US
dc.contributor.authorChiang, KCen_US
dc.contributor.authorLei, TFen_US
dc.contributor.authorLee, CLen_US
dc.date.accessioned2014-12-08T15:39:45Z-
dc.date.available2014-12-08T15:39:45Z-
dc.date.issued2004en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/27145-
dc.identifier.urihttp://dx.doi.org/10.1149/1.1819855en_US
dc.description.abstractWe investigated the carrier transportation of ultrathin CeO2 gate dielectrics with rapid thermal annealing (RTA). After annealing, the effective oxide thickness was decreased and the characteristics were significantly improved. Temperature dependence of gate leakage current was studied and Frenkel-Poole dominated the conduction mechanism for low RTA temperature. As the annealing temperature increases, Fowler-Nordheim tunneling became much more important and the CeO2/n-Si electron barrier height of 0.75 eV was extracted for future modeling and simulation. In addition, the energy band diagram of Al/CeO2/n-Si structure was established for the first time. (C) 2004 The Electrochemical Society.en_US
dc.language.isoen_USen_US
dc.titleCarrier transportation of rapid thermal annealed CeO2 gate dielectricsen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.1819855en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume7en_US
dc.citation.issue12en_US
dc.citation.spageE55en_US
dc.citation.epageE57en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000228540700022-
dc.citation.woscount16-
Appears in Collections:Articles