標題: DESIGN SPACE EXPLORATION OF AN H.264/AVC-BASED VIDEO EMBEDDING TRANSCODER USING TRANSACTION LEVEL MODELING
作者: Li, Chih-Hung
Peng, Wen-Hsiao
Chiang, Tihao
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Video embedding transcoder;design space exploration;transaction level modeling
公開日期: 2008
摘要: In this paper, we perform the design space exploration for an H.264/AVC video embedding transcoder. Specifically, the design space is pruned for the sub-modules including inverse transform, inter and intra. prediction, and deblocking filter with various microarchitecture designs, processing order, memory hierarchy, and granularity of synchronization. In addition, we propose an efficient deblocking filter suitable for 8x8 block pipeline. Compared to the traditional designs, our proposed deblocking filter reduces memory requirement, processing latency, and access frequency to the local memory. The synthesized logic gate count is only 8K using the 0.18 um technology with the maximum frequency of 162 MHz. For rapid exploration, all the design alternatives are simulated with higher level of abstraction using the transaction level modeling to explore 160 design combinations. Our simulation results provide an extensive tradeoff analysis among processing speed, cost, and utilization. Besides, the cost-normalized hardware utilization where the cost of each sub-module weights its associated utilization assists the system designers to keep a balance across different modules.
URI: http://hdl.handle.net/11536/2719
ISBN: 978-1-4244-2570-9
期刊: 2008 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, VOLS 1-4
起始頁: 1053
結束頁: 1056
顯示於類別:會議論文