An algorithm for calculating the lower confidence bounds of C-PU and C-PL with application to low-drop-out linear regulators (vol 43, pg 495, 2003)

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DC 欄位	值	語言
dc.contributor.author	Pearn, WL	en_US
dc.contributor.author	Shu, MH	en_US
dc.date.accessioned	2014-12-08T15:40:33Z	-
dc.date.available	2014-12-08T15:40:33Z	-
dc.date.issued	2003-08-01	en_US
dc.identifier.issn	0026-2714	en_US
dc.identifier.uri	http://dx.doi.org/10.1016/S0026-2714(03)00187-2	en_US
dc.identifier.uri	http://hdl.handle.net/11536/27681	-
dc.language.iso	en_US	en_US
dc.title	An algorithm for calculating the lower confidence bounds of C-PU and C-PL with application to low-drop-out linear regulators (vol 43, pg 495, 2003)	en_US
dc.type	Correction	en_US
dc.identifier.doi	10.1016/S0026-2714(03)00187-2	en_US
dc.identifier.journal	MICROELECTRONICS RELIABILITY	en_US
dc.citation.volume	43	en_US
dc.citation.issue	8	en_US
dc.citation.spage	1349	en_US
dc.citation.epage	1349	en_US
dc.contributor.department	工業工程與管理學系	zh_TW
dc.contributor.department	Department of Industrial Engineering and Management	en_US
dc.identifier.wosnumber	WOS:000184674500025	-
dc.citation.woscount	0	-
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