DESIGN OF ON-CHIP POWER-RAIL ESD CLAMP CIRCUIT WITH ULTR-SMALL CAPACITANCE TO DETECT ESD TRANSITION

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chen, Shih-Hung	en_US
dc.contributor.author	Ker, Ming-Dou	en_US
dc.date.accessioned	2014-12-08T15:41:15Z	-
dc.date.available	2014-12-08T15:41:15Z	-
dc.date.issued	2009	en_US
dc.identifier.isbn	978-1-4244-2781-9	en_US
dc.identifier.uri	http://hdl.handle.net/11536/28053	-
dc.description.abstract	A power-rail ESD clamp circuit with a new proposed ESD-transient detection circuit which adopts a ultra small capacitor to achieve the required functions has been presented and substantiated to own a long turn-on duration and high turn-on efficiency. In addition, the power-rail ESD clamp circuits with the new proposed ESD-transient detection circuit also presented an excellent immunity against the mis-trigger and the latch-on event under the fast power-on condition.	en_US
dc.language.iso	en_US	en_US
dc.title	DESIGN OF ON-CHIP POWER-RAIL ESD CLAMP CIRCUIT WITH ULTR-SMALL CAPACITANCE TO DETECT ESD TRANSITION	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM	en_US
dc.citation.spage	327	en_US
dc.citation.epage	330	en_US
dc.contributor.department	電機學院	zh_TW
dc.contributor.department	College of Electrical and Computer Engineering	en_US
dc.identifier.wosnumber	WOS:000271941200082	-
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