完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ton, LR | en_US |
dc.contributor.author | Chang, LC | en_US |
dc.contributor.author | Chung, CP | en_US |
dc.date.accessioned | 2014-12-08T15:42:02Z | - |
dc.date.available | 2014-12-08T15:42:02Z | - |
dc.date.issued | 2002-09-01 | en_US |
dc.identifier.issn | 1383-7621 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1016/S1383-7621(02)00053-X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/28568 | - |
dc.description.abstract | The execution performance of a stack-based Java virtual machine (JVM) is limited by the true data dependency. To enhance the performance of the JVM, a stack operations folding mechanism for the picoJava-I/II processor was proposed by Sun Microsystems to fold 42.3% stack operations. By comparing the continuous bytecodes with predefined folding patterns in instruction decoder, the number of push/pop operations in between the operand stack and the local variable could be reduced. In this study, an enhanced POC (EPOC) folding model is proposed to further fold the discontinuous bytecodes that cannot be folded in continuous bytecodes folding mechanisms. By proposing a stack re-order buffer (SROB) to help the folding check processes, the EPOC folding model can fold the stack operations perfectly with a small size of SROB implementation. Statistical data shows that the four-foldable strategy of the EPOC folding model can eliminate 98.8% of push/pop operations with an instruction buffer size of 7 bytes and the SROB size of eight entries. (C) 2002 Elsevier Science B.V. All rights reserved. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Java virtual machine | en_US |
dc.subject | stack operations folding | en_US |
dc.subject | POC folding model | en_US |
dc.subject | EPOC folding model | en_US |
dc.subject | Java processor | en_US |
dc.title | An analytical POC stack operations folding for continuous and discontinuous Java bytecodes | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/S1383-7621(02)00053-X | en_US |
dc.identifier.journal | JOURNAL OF SYSTEMS ARCHITECTURE | en_US |
dc.citation.volume | 48 | en_US |
dc.citation.issue | 1-3 | en_US |
dc.citation.spage | 1 | en_US |
dc.citation.epage | 16 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000178120700001 | - |
dc.citation.woscount | 5 | - |
顯示於類別: | 期刊論文 |