標題: Analysis of buffer requirement for ATM-LSRs with partial VC-merging capability
作者: Lin, PC
Chang, CJ
電信工程研究所
Institute of Communications Engineering
關鍵字: label switching router (LSR);ATM-LSR;ATM VC-merging
公開日期: 1-六月-2002
摘要: In an Multi-Protocol Label Switching (MPLS) network domain, Asynchronous Transfer Mode-Label Switch Routers (ATM-LSRs) are considered the best candidate for providing the highest forwarding capability. ATM-LSRs implement a VC-merging scheme that allows many IP routes to be mapped into the same VPI/VCI label, hence supporting scalability. The VC-merging requires reassembly buffers to reconstruct an original packet from its segmented but interleaved AAL-5 cells. In this paper, we analyze the performance of an ATM-LSR with partial VC-merging capability and investigate the impact of VC-merging on the requirement of the reassembly and output buffer. The numerical computation complexity of the mathematical analysis can be reduced from O(M-4) to O(M-2), where M is the total number of ON-OFF sources. We also propose a closed-form equation, which approximates the distribution of the output buffer with satisfactory accuracy. Numerical results show that when incoming cells are severely interleaved, the VC-merging needs the reassembly buffer size to be of the same order as the output buffer size, which cannot be ignored.
URI: http://hdl.handle.net/11536/28763
ISSN: 0916-8516
期刊: IEICE TRANSACTIONS ON COMMUNICATIONS
Volume: E85B
Issue: 6
起始頁: 1115
結束頁: 1123
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