完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, HC | en_US |
dc.contributor.author | Pan, JS | en_US |
dc.contributor.author | Lu, ZM | en_US |
dc.contributor.author | Sun, SH | en_US |
dc.contributor.author | Hang, HM | en_US |
dc.date.accessioned | 2014-12-08T15:43:38Z | - |
dc.date.available | 2014-12-08T15:43:38Z | - |
dc.date.issued | 2001-07-01 | en_US |
dc.identifier.issn | 0165-1684 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1016/S0165-1684(01)00048-2 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/29511 | - |
dc.description.abstract | Genetic algorithm (GA) has been successfully applied to codebook design for vector quantization (VQ). However, most conventional GA-based codebook design methods need long runtime because candidate solutions must be fine tuned by LBG. In this paper, a partition-based GA is applied to codebook design, which is referred to as genetic vector quantization (GVQ). In addition, simulated annealing (SA) algorithm is also used in GVQ to get more promising results and the corresponding method is referred to as GSAVQ. Both GVQ and GSAVQ use the linear scaling technique during the calculation of objective functions and use special crossover and mutation operations in order to obtain better codebooks in much shorter CPU time. Experimental results show that both of them save more than 71-87% CPU time compared to LEG. For different codebook sizes, GVQ outperforms LEG by 1.1-2.1 dB in PSNR, and GSAVQ outperforms LBG by 1.2-2.2 dB in PSNR. In addition, GVQ and GSAVQ need a little longer CPU time than, the maximum decent (MD) algorithm, but they outperform MD by 0.2-0.5 dB in PSNR. (C) 2001 Elsevier Science B.V. All rights reserved. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | vector quantization | en_US |
dc.subject | codebook design | en_US |
dc.subject | genetic algorithm | en_US |
dc.subject | simulated annealing | en_US |
dc.title | Vector quantization based on genetic simulated annealing | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/S0165-1684(01)00048-2 | en_US |
dc.identifier.journal | SIGNAL PROCESSING | en_US |
dc.citation.volume | 81 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 1513 | en_US |
dc.citation.epage | 1523 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000169493900013 | - |
dc.citation.woscount | 36 | - |
顯示於類別: | 期刊論文 |