完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hou, Y | en_US |
dc.contributor.author | Wang, CM | en_US |
dc.contributor.author | Ku, CY | en_US |
dc.contributor.author | Hsu, LH | en_US |
dc.date.accessioned | 2014-12-08T15:43:56Z | - |
dc.date.available | 2014-12-08T15:43:56Z | - |
dc.date.issued | 2001-05-01 | en_US |
dc.identifier.issn | 1045-9219 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/71.926171 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/29701 | - |
dc.description.abstract | In this paper, we address the problem of minimizing channel contention of linear-complement communication on wormhole-routed hypercubes. Our research reveals that, for traditional routing algorithms, the degree of channel contention of a linear-complement communication can be quite large. To solve this problem, we propose an alternative approach, which applies processor reordering mapping at compile time. in this compiler approach, processors are logically reordered according to the given communication(s) so that the new communication(s) can be efficiently realized on the hypercube network. It is proved that, for any linear-complement communication, there exists a reordering mapping such that the new communication has minimum channel contention. An O(n(3)) algorithm is proposed to find such a mapping for an n-dimensional hypercube. An algorithm based on dynamic programming is also proposed to find an optimal reordering mapping for a set of linear-complement communications. Several computer simulations have been conducted and the results clearly show the advantage of the proposed approach. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | hypercubes | en_US |
dc.subject | linear-complement communication | en_US |
dc.subject | channel contention | en_US |
dc.subject | processor mapping | en_US |
dc.subject | wormhole routing | en_US |
dc.title | Optimal processor mapping for linear-complement communication on hypercubes | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/71.926171 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS | en_US |
dc.citation.volume | 12 | en_US |
dc.citation.issue | 5 | en_US |
dc.citation.spage | 514 | en_US |
dc.citation.epage | 527 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000168690400006 | - |
dc.citation.woscount | 2 | - |
顯示於類別: | 期刊論文 |