完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Huang, HJ | en_US |
dc.contributor.author | Chen, KM | en_US |
dc.contributor.author | Chang, CY | en_US |
dc.contributor.author | Huang, TY | en_US |
dc.date.accessioned | 2014-12-08T15:44:10Z | - |
dc.date.available | 2014-12-08T15:44:10Z | - |
dc.date.issued | 2001-03-01 | en_US |
dc.identifier.issn | 0013-4651 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1149/1.1346619 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/29832 | - |
dc.description.abstract | Co-silicided, strained boron-doped Si1-xGex p(+)/n junction with different Ge mole fractions deposited by ultrahigh vacuum chemical molecular epitaxy (UHVCME), suitable for raised source/drain metal oxide semiconductor field effect transistor applications, is studied. The electrical and compositional characteristics are presented. By using a Co/Si-cap/graded Si1-xGex structure, optimum forward and reverse diode characteristics with a near perfect forward ideality factor (i.e., <1.01) can be obtained for the p(+)-n junction. Thr low area leakage current extracted from Si-capped samples confirms that serious lattice misfit problems during silicidation, typical of Co/pure Si1-xGex samples, is largely eliminated by Si capping. In addition, the specific contact resistance is found to decrease as Ge mole fraction increases, and would be even lower if Si capping is used for silicidation. Finally, the composition of Co/Si1-xGex and Co/Si-cap/Si1-xGex interfacial reaction is studied by high-resolution X-ray spectra. Our results show that even after a second anneal at 850<degrees>C, very little lattice distortion is discovered. Five harmonic peaks still remain even after a second anneal at 850 degreesC. Transmission electron micrograph also exhibits good uniformity and interface quality. (C) 2001 The Electrochemical Society. All rights reserved. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Electrical and compositional properties of co-silicided shallow p(+)-n junction using Si-capped/boron-doped Si1-xGex layer deposited by UHVCME | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1149/1.1346619 | en_US |
dc.identifier.journal | JOURNAL OF THE ELECTROCHEMICAL SOCIETY | en_US |
dc.citation.volume | 148 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | G126 | en_US |
dc.citation.epage | G131 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000167545700050 | - |
dc.citation.woscount | 1 | - |
顯示於類別: | 期刊論文 |