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dc.contributor.authorHong, HPen_US
dc.contributor.authorWu, JCen_US
dc.date.accessioned2014-12-08T15:44:20Z-
dc.date.available2014-12-08T15:44:20Z-
dc.date.issued2001-01-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/4.896242en_US
dc.identifier.urihttp://hdl.handle.net/11536/29938-
dc.description.abstractWhen MOSFET is used as a power switch, if is essential to prevent reverse current flow through the parasitic body diodes under reverse voltage condition. A new built-in reverse voltage protection circuit for MOSFETs has been developed. In this design, an area-efficient circuit is used to automatically select the proper well bias voltage to prevent reverse current under the reverse-voltage condition. This built-in reverse protection circuit has been successfully implemented in a high-side power switch application using a 0.6-mum CMOS process. The die area of the protection circuit is only 2.63 % of that of a MOSFET. The latch-up immunity is greater than +12 V and -10 V in voltage triggering mode, and greater than +/-500 mA in current triggering mode, The protection circuit is not in series with the MOSFET switch, so that the full output swing and high power efficiency are achieved.en_US
dc.language.isoen_USen_US
dc.subjectCMOSen_US
dc.subjectlatch-upen_US
dc.subjectpower switchen_US
dc.titleA reverse-voltage protection circuit for MOSFET power switchesen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/4.896242en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume36en_US
dc.citation.issue1en_US
dc.citation.spage152en_US
dc.citation.epage155en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000166569700020-
dc.citation.woscount3-
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