標題: Effect of rapid thermal annealed TiN barrier layer on BST capacitors prepared by RF magnetron cosputter system at low substrate temperatures
作者: Hwang, CC
Jaing, CC
Lai, MJ
Chen, JS
Huang, S
Juang, MH
Cheng, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-十二月-2000
摘要: This work reports on rapid-thermal-annealed TiN as a barrier for Pt/BST/Pt/TiN/Ti/Si capacitors. Experimental results indicate that the diffusion of Ti and Si from the Ti adhesion layer and Si plug, respectively, degrade the capacitor for the gigabit dynamic random access memories (DRAMs) using barium strontium titanate (BST) as a dielectric material. Although the diffusion barrier TiN between the bottom electrode Pt and Ti adhesion layer has been conventionally used to release the issue, the interdiffusion of Ti and Si occurs due to the thermal budget of the BST deposition. A rapid thermal annealing process is applied to the as-deposited TiN barrier against the interdiffusion. Excellent electrical characteristics, including high dielectric constant (epsilon (r) = 320), low leakage current (1.5 x 10(-8) A/cm(2)) under 0.1 MV/cm, and a lifetime greater than 10 years under 1.5 MV/cm are obtained. Our results further demonstrate that the proposed technique is highly promising for future high-density DRAMs. (C) 2000 The Electrochemical Society. S1099-0062(00)07-005-X. All rights reserved.
URI: http://dx.doi.org/10.1149/1.1391209
http://hdl.handle.net/11536/30089
ISSN: 1099-0062
DOI: 10.1149/1.1391209
期刊: ELECTROCHEMICAL AND SOLID STATE LETTERS
Volume: 3
Issue: 12
起始頁: 563
結束頁: 565
顯示於類別:期刊論文