完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | TSUI, BY | en_US |
dc.contributor.author | CHEN, MC | en_US |
dc.date.accessioned | 2014-12-08T15:04:35Z | - |
dc.date.available | 2014-12-08T15:04:35Z | - |
dc.date.issued | 1993-04-01 | en_US |
dc.identifier.issn | 0038-1101 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/3078 | - |
dc.description.abstract | Traditionally it was believed that platinum does not interact with silicon dioxide during thermal treatment in an N2 ambient. In this work, however, dielectric degradation of the Pt/SiO2/Si structure during thermal annealing was observed. The density of surface states at the SiO2/Si interface increases and the dielectric strength of the oxide decreases after annealing at temperatures higher than 600-degrees-C. Ion implantation through the Pt/SiO2 structure enhances the degradation. After removal of the Pt film, a second annealing can reduce the surface state density but the dielectric strength cannot be recovered. Although material analysis such as AES and SIMS shows no obvious differences between the fresh SiO2 and the degraded SiO2, electrical analyses indicate that thermal stress is responsible for the increase of the surface states while Pt dissolving in SiO2 is responsible for the decrease of the dielectric strength. Thus, the process sequence should be taken into consideration for practical application. | en_US |
dc.language.iso | en_US | en_US |
dc.title | DIELECTRIC DEGRADATION OF PT/SIO2/SI STRUCTURES DURING THERMAL ANNEALING | en_US |
dc.type | Article | en_US |
dc.identifier.journal | SOLID-STATE ELECTRONICS | en_US |
dc.citation.volume | 36 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.spage | 583 | en_US |
dc.citation.epage | 593 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1993KU29400015 | - |
dc.citation.woscount | 2 | - |
顯示於類別: | 期刊論文 |