完整後設資料紀錄
DC 欄位語言
dc.contributor.authorTsai, Joseph Tso-Shengen_US
dc.contributor.authorChiueh, Hermingen_US
dc.date.accessioned2014-12-08T15:46:13Z-
dc.date.available2014-12-08T15:46:13Z-
dc.date.issued2008en_US
dc.identifier.isbn978-1-4244-2078-0en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/31087-
dc.description.abstractA low-cost and high linear voltage reference circuitry is designed and implemented in TSMC 0.18 mu m CMOS technology. Previous research has proposed the use of MOS transistors operated in the weak inversion region to replace the bipolar devices with conventional PTAT (proportional to absolute temperature) circuits. However, such solutions often cause linearity problem in high temperature region because of the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a stable IOAT voltage reference. Based on the measurement results, the R-square of PTAT reference is better than 0.9 and the temperature coefficient of IOAT reference is 14 ppm/degrees C in a considerable wider temperature range from -60 degrees C to 140 degrees C. The occupied chip area is 0.00126 mm(2). Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts.en_US
dc.language.isoen_USen_US
dc.titleHigh linear voltage references for on-chip CMOS smart temperature sensor from-60 degrees C to 140 degrees Cen_US
dc.typeArticleen_US
dc.identifier.journalPROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10en_US
dc.citation.spage2689en_US
dc.citation.epage2692en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000258532102134-
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