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dc.contributor.authorChang, Mu-Tienen_US
dc.contributor.authorHwang, Weien_US
dc.date.accessioned2014-12-08T15:47:26Z-
dc.date.available2014-12-08T15:47:26Z-
dc.date.issued2008en_US
dc.identifier.isbn978-1-4244-2341-5en_US
dc.identifier.urihttp://hdl.handle.net/11536/31798-
dc.description.abstractSRAM cell stability is a major challenge in subthreshold SRAM design. In this paper, a robust, fully-differential subthreshold 10-transistors SRAM cell with auto-compensation is proposed. With the auto-compensation mechanism, the proposed cell exhibits better hold static noise margin (SNM). The cell structure also prevents storage nodes from bitline noise interference, thus improving read SNM. Moreover, better write ability is achieved by applying write assist technique. Based on UMC 90nm CMOS technology, simulation results shows that at 200mV supply voltage, the proposed cell has 1.22X hold SNM improvement, 2.09X read SNM improvement, and 2.03X write margin improvement compared to the conventional 6T SRAM cell.en_US
dc.language.isoen_USen_US
dc.titleA Fully-Differential Subthreshold SRAM Cell with Auto-Compensationen_US
dc.typeArticleen_US
dc.identifier.journal2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4en_US
dc.citation.spage1771en_US
dc.citation.epage1774en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000268007100439-
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