完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | YANG, C | en_US |
dc.date.accessioned | 2014-12-08T15:04:41Z | - |
dc.date.available | 2014-12-08T15:04:41Z | - |
dc.date.issued | 1993-01-01 | en_US |
dc.identifier.issn | 0267-6192 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/3183 | - |
dc.description.abstract | A multigauge computer can have its data path split into independent data paths which execute operations on 'small' data concurrently. In this paper we explain how certain forms of multigauge processing can be implemented with little cost in hardware; we illustrate this 'low cost' implementation by describing the multigauging of the Quarter Horse microprocessor. and report on two practical applications from graphics for which 95% of the theoretically possible speedup is achieved. The measurements are based on the simulation of compiled code of the graphic applications. When instruction time is considered, the improvement is even more substantial: the super-linear is possible. We conclude that because multigauging can be used with other architectural structures, it is an effective way of exploiting parallelism. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | MULTIGAUGE COMPUTERS | en_US |
dc.subject | MULTIGAUGE PROCESSING | en_US |
dc.subject | QUARTER HORSE MICROPROCESSOR | en_US |
dc.title | MULTIGAUGE COMPUTERS AND THEIR APPLICATIONS | en_US |
dc.type | Article | en_US |
dc.identifier.journal | COMPUTING SYSTEMS | en_US |
dc.citation.volume | 8 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 33 | en_US |
dc.citation.epage | 39 | en_US |
dc.contributor.department | 管理科學系 | zh_TW |
dc.contributor.department | Department of Management Science | en_US |
dc.identifier.wosnumber | WOS:A1993KK16900004 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |