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dc.contributor.authorYANG, Cen_US
dc.date.accessioned2014-12-08T15:04:41Z-
dc.date.available2014-12-08T15:04:41Z-
dc.date.issued1993-01-01en_US
dc.identifier.issn0267-6192en_US
dc.identifier.urihttp://hdl.handle.net/11536/3183-
dc.description.abstractA multigauge computer can have its data path split into independent data paths which execute operations on 'small' data concurrently. In this paper we explain how certain forms of multigauge processing can be implemented with little cost in hardware; we illustrate this 'low cost' implementation by describing the multigauging of the Quarter Horse microprocessor. and report on two practical applications from graphics for which 95% of the theoretically possible speedup is achieved. The measurements are based on the simulation of compiled code of the graphic applications. When instruction time is considered, the improvement is even more substantial: the super-linear is possible. We conclude that because multigauging can be used with other architectural structures, it is an effective way of exploiting parallelism.en_US
dc.language.isoen_USen_US
dc.subjectMULTIGAUGE COMPUTERSen_US
dc.subjectMULTIGAUGE PROCESSINGen_US
dc.subjectQUARTER HORSE MICROPROCESSORen_US
dc.titleMULTIGAUGE COMPUTERS AND THEIR APPLICATIONSen_US
dc.typeArticleen_US
dc.identifier.journalCOMPUTING SYSTEMSen_US
dc.citation.volume8en_US
dc.citation.issue1en_US
dc.citation.spage33en_US
dc.citation.epage39en_US
dc.contributor.department管理科學系zh_TW
dc.contributor.departmentDepartment of Management Scienceen_US
dc.identifier.wosnumberWOS:A1993KK16900004-
dc.citation.woscount0-
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