統計資料
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| A physical model for the correlation between holding voltage and holding current in epitaxial CMOS latch-up | 108 |
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| 000074931000002.pdf | 3 |
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| 檢視 | |
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| A physical model for the correlation between holding voltage and holding current in epitaxial CMOS latch-up | 108 |
| 檢視 | |
|---|---|
| 000074931000002.pdf | 3 |
| 檢視 | |
|---|---|
| 中國 | 96 |
| 美國 | 12 |
| 檢視 | |
|---|---|
| Shenzhen | 96 |
| Menlo Park | 8 |
| Kensington | 4 |