完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Shieh, SP | en_US |
dc.contributor.author | Chen, JN | en_US |
dc.date.accessioned | 2014-12-08T15:49:06Z | - |
dc.date.available | 2014-12-08T15:49:06Z | - |
dc.date.issued | 1998-05-15 | en_US |
dc.identifier.issn | 0140-3664 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/32623 | - |
dc.description.abstract | In this paper, we propose a new formalism, named the Timed Communicating Finite State Machine (Timed CFSM), for specifying and verifying time-critical systems. Timed CFSM preserves the advantages of CFSM, such as the ability to express communication, synchronization and concurrency in computer systems. A given time-dependent specification can be formalized as a Timed CFSM, from which the reachability graph is constructed to verify the correctness of the specification. To cope with the space explosion problem from which all reachability analysis methods suffer, we propose a space reduction algorithm to meet the space constraint of the verification environment. (C) 1998 Elsevier Science B.V. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | time-critical systems | en_US |
dc.subject | specification | en_US |
dc.subject | validation | en_US |
dc.subject | verification | en_US |
dc.subject | reachability analysis | en_US |
dc.subject | the space explosion problem | en_US |
dc.subject | path approach | en_US |
dc.title | Specification, validation, and verification of time-critical systems | en_US |
dc.type | Article | en_US |
dc.identifier.journal | COMPUTER COMMUNICATIONS | en_US |
dc.citation.volume | 21 | en_US |
dc.citation.issue | 5 | en_US |
dc.citation.spage | 460 | en_US |
dc.citation.epage | 469 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000074593900005 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |