完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | JUANG, MH | en_US |
dc.contributor.author | CHENG, HC | en_US |
dc.date.accessioned | 2014-12-08T15:04:46Z | - |
dc.date.available | 2014-12-08T15:04:46Z | - |
dc.date.issued | 1992-10-01 | en_US |
dc.identifier.issn | 0038-1101 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/3271 | - |
dc.description.abstract | High-quality silicided shallow n+p junctions have been fabricated by P+ implantation into thin Ti films on Si substrates and by moderate implant conditions as well as subsequent high-temperature rapid thermal annealing (RTA) followed by low-temperature conventional furnace annealing (CFA). RTA minimizes the diffusion of knock-on Ti but greatly reduces the drive-in efficiency because of its short annealing time. Driving the dopants out of silicides via long-time annealing was associated with the crystallinity of silicides. The junctions formed by this scheme with respect to various implant and anneal conditions have been characterized. In addition, the distribution profile of Ti penetration was correlated with the effective generation life time obtained from the reverse I-V curves. | en_US |
dc.language.iso | en_US | en_US |
dc.title | CHARACTERIZATION OF SILICIDED SHALLOW N+P JUNCTIONS FORMED BY P+ IMPLANTATION INTO THIN TI FILMS ON SI SUBSTRATES | en_US |
dc.type | Article | en_US |
dc.identifier.journal | SOLID-STATE ELECTRONICS | en_US |
dc.citation.volume | 35 | en_US |
dc.citation.issue | 10 | en_US |
dc.citation.spage | 1535 | en_US |
dc.citation.epage | 1542 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1992JP71900025 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |