完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Cheng, Kuang-Chin | en_US |
dc.contributor.author | Jou, Jing-Yang | en_US |
dc.date.accessioned | 2014-12-08T15:04:49Z | - |
dc.date.available | 2014-12-08T15:04:49Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.isbn | 978-1-4244-1616-5 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/3329 | - |
dc.description.abstract | In this paper, a bus encoding approach including related code generation algorithm for global data busses is developed to produce area-efficient crosstalk-avoidance (CA) codes with considering low-power requirements. Proposed codes are codes with memory using overlapping boundary strategy. The probabilistic distribution of input data could be included to reduce the power consumption. The performance improvement of CA codes is nearly 2x for heavily coupled busses based on theoretical analysis. As compared to uncoded datawords, proposed codes show 12% to 38% energy-reduction on bus for an equi-probable 32-bit bus design. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A code generation algorithm of crosstalk-avoidance code with memory for low-power on-chip bus | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2008 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM | en_US |
dc.citation.spage | 172 | en_US |
dc.citation.epage | 175 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000256565800042 | - |
顯示於類別: | 會議論文 |