RESIDUE ARITHMETIC VLSI ARRAY ARCHITECTURE FOR MANIPULATOR PSEUDO-INVERSE JACOBIAN COMPUTATION - REPLY

標題:	RESIDUE ARITHMETIC VLSI ARRAY ARCHITECTURE FOR MANIPULATOR PSEUDO-INVERSE JACOBIAN COMPUTATION - REPLY
作者:	CHANG, PP LEE, CSG 電信工程研究所 Institute of Communications Engineering
公開日期:	1-十月-1991
URI:	http://hdl.handle.net/11536/3676
ISSN:	1042-296X
期刊:	IEEE TRANSACTIONS ON ROBOTICS AND AUTOMATION
Volume:	7
Issue:	5
起始頁:	717
結束頁:	717
顯示於類別：	期刊論文