應用於H.264/AVC高解析度即時系統之邊緣基底快速內部預測模組決策演算法的改善與實作

Abstract

本論文中提出了於H.264/AVC在高解析度即時應用時，快速內部預測模組決策(Fast intra prediction mode decision)的硬體架構。 由於在H.264/AVC中，內部預測模組決策的運算在整個H.264/AVC運算裡佔有一定比重，此外，內部預測模組結策又需要額外的時間(約20%)來產生預測模組，加上處理資料本身又具高相關性，因此，使得在高解析度即時應用下出現了瓶頸。 在加速內部預測模組決策的運算中，我們使用了一種以影像邊緣資訊為依據的演算法，能夠在不大量損失影像品質及增加傳輸資料的前提下，節省大約66%的模組評估運算，根據此種演算法，我們提出一種硬體代價較低的架構，相較以往的設計可以減少約50%的邏輯閘數，總邏輯閘數也僅需86,671，最大操作頻率達到250MHz，對於目前所有高解析度影像的即時處理有很大的效益，同時亦不用增加太多的硬體需求。

In this thesis, we propose architecture of H.264/AVC fast intra prediction mode decision in high resolution real-time applications. Because the intra prediction mode decision occupied lots computations of the H.264/AVC video coding, besides it needs the extra time for modes generating of the intra prediction mode decision (about 20%), and the processed data is high dependence also, hence, it is a bottleneck of the high resolution real-time applications. In the intra prediction mode decision operations, we use an algorithm which based on the edge information of the object. It can reduce about 66% estimations of mode predictions with negligible loss of video quality and a little increasing of data rate. According to this algorithm, we propose a low cost architecture and the gate counts can be reduced about 50% to compare with the former design. The total gate counts are 86,671 only and the maximum operating frequency is 250 MHz. It is a favorable contribution to all the current high resolution real-time video processing while without spending a lot of hardware.