標題: | 鉬奈米點在非揮發性記憶體應用之研究 Study on Floating-Gate Molybdenum Nanocrystals for Nonvolatile Memory Application |
作者: | 廖述穎 施敏 電子研究所 |
關鍵字: | 鉬;記憶體;Mo;memory |
公開日期: | 2007 |
摘要: | 非揮發性記憶體(NVM)目前在元件尺寸持續微縮下的需求為高密度記憶單元、低功率損耗、快速讀寫操作、以及良好的可靠度(Reliability)。傳統浮動閘極(floating gate)記憶體在操作過程中如果穿隧氧化層產生漏電路徑會造成所有儲存電荷流失回到矽基板,所以在資料保存時間(Retention)和耐操度(Endurance)的考量下,很難去微縮穿隧氧化層的厚度。非揮發性奈米點記憶體被提出希望可取代傳統浮動閘極記憶體,由於奈米點可視為電荷儲存層中彼此分離的儲存點,可以有效改善小尺寸記憶體元件多次操作下的資料儲存能力。近年來發展了許多方法來形成奈米點,一般而言,大多數的方法都需要長時間高溫的熱製程,這個步驟會影響現階段半導體製程中的熱預算和產能。
在本文中,一個簡單的製程方法用來形成鉬(Molybdenum)奈米點,並應用於非揮發性記憶體。室溫下,共蒸鍍(co-evaporating)鈀材Mo和介電質(如:SiOx、SiNx、AlOx)形成介電質包覆著鉬奈米點的非揮發性記憶體結構,我們認為在退火過程中形成奈米點,溫度扮演一個重要的腳色,可以簡單並均勻地形成高密度(~1012 cm-2)的奈米點。我們發現高密度的鉬奈米點被包覆在氧化鋁(AlOx)中有較好的儲存能力。此外,這個應用在非揮性記憶體的製程技術同時也適用於現階段積體電路製程。 Current requirements of nonvolatile memory (NVM) are the high density cells, low-power consumption, high-speed operation and good reliability for the scaling down devices. However, all of the charges stored in the floating gate will leak into the substrate if the tunnel oxide has a leakage path in the conventional NVM during endurance test. Therefore, the tunnel oxide thickness is difficult to scale down in terms of charge retention and endurance characteristics. The nonvolatile nanocrystal memories are one of promising candidates to substitute for conventional floating gate memory, because the discrete storage nodes as the charge storage media have been effectively improve data retention under endurance test for the scaling down device. Many methods have been developed recently for the formation of nanocrystal. Generally, most methods need thermal treatment with high temperature and long duration. This procedure will influence thermal budget and throughput in current manufacture technology of semiconductor industry. In this thesis, an ease fabrication technique of molybdenum nanocrystals was demonstrated for the application of nonvolatile memory. The nonvolatile memory structure of molybdenum nanocrystals embedded in the dielectric layer was fabricated by co-evaporating molybdenum and dielectric which like SiOx, SiNx and AlOx at room temperature. It can be considered that the annealing tamperature plays a critical role during sputter process for the formation of nanocrystal. In addition, the high density (~1011 cm-2) nanocrystal can be simple and uniform to be fabricated in our study. We also proposed a formation of molybdenum nanocrystals embedded in AlOx by co-evaporating molybdenum and AlOx at room temperature. It was also found that high density Mo nanocrystals embedded in theAlOx and larger memory effect. These fabrication techniques for the application of nonvolatile nanocrystal memory can be compatible with current manufacture process of the integrated circuit manufacture. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009511575 http://hdl.handle.net/11536/38107 |
顯示於類別: | 畢業論文 |