標題: 應用於三相直流無刷馬達之150度12步方波無感測驅動技術與速度控制
Twelve-Step Sensorless Drive and Speed Control for a Three-Phase Brushless DC Motor
作者: 吳昱錚
Wu, Yu-Cheng
林錫寬
Lin, Shir-Kuan
電控工程研究所
關鍵字: 三相無刷直流馬達;無感測控制;場效型可規劃邏輯陣列元件;150度12步方波驅動;three-phase brushless DC motor (BLDC);sensorless control;FPGA;150-degree electrical angles driving
公開日期: 2007
摘要: 小型三相無刷直流馬達具有高可靠性、高效率和可控制性的優點,已被廣泛的應用於各種場合。然而,傳統的小型三相無刷直流馬達必須利用霍爾元件(Hall sensor)來偵測其轉子與定子之相對位置,其限制有:感測器須精準地擺放在馬達旁特定位置才能準確地獲得轉子目前狀況、對於溫度與雜訊具有高敏感度、降低馬達壽命、增加成本與阻礙馬達輕薄短小化。而沒有使用霍爾元件的無感測驅動技術則可以改善上述的各項缺點。 本論文以150度無感測換相為基礎[13],藉由馬達的電壓與電流回授訊號達到正常驅動的目的。克服脈波寬度調變(PWM)訊號對無感測換相的影響,進一步延伸推展至對其實現速度控制,並利用線性調變與數位濾波器兩種不同的方式使得馬達可控速度範圍增加,再者加入反積分過飽和控制器使整體速度響應更為良好,最後利用此設計開發一個小型三相無刷直流馬達的數位式無感測馬達控制晶片,而本文主要成果已發表在期刊論文[10]上。 實驗運用場效型可規劃邏輯陣列元件(FPGA)和硬體描述語言(VHDL)進行系統層級模組化設計。其中,估算線性調變函式以使馬達轉速降低同時正常換相;使用數位濾波器以克服PWM訊號對換相訊號所造成之干擾;加入反積分過飽和控制器使馬達速度響應表現提升。因此,FPGA晶片內部運算搭配外部馬達、六橋驅動電路、AD電流回授與電壓感測,完成三相無刷直流光碟機馬達150度無感測控制系統的建構與實作驗證。
Small three-phase brushless direct current motors (BLDCMs) that own high reliability, high efficiency and good controllability are extensively adopted. However, the traditional BLDCMs have to use Hall sensors to detect thecorresponding position of the rotor and the stator which leads to some limitations: The Hall sensors must be locatedprecisely in the specific position beside the motor in order to exactly acquire the present state of the rotor; High sensitivityto temperture and disturbance; Life reducing; Cost increasing and obstruct the minimization of it. Using the sensorless drive schemes which do not rely on the Hall senors can improvevarious drawbacks mentioned above. On the basis of the 150° sensorless drive scheme[13],depended on the voltage and feedback current signals of the motor to reach the goal of normal drive. Overcome the influence of the pulse width modulation (PWM) signal during commutation for the purpose of controlling its speed. ; Applytwo approaches: Linear modulation approach and digital filter approach for the purpose of increasing its controllable speedrange; Attach an anti-windup controller for the propose ofimproving its speed response, and finally use these schemes to develop a digital sensorless drive chip applied to smallBLDCMs. The main results of this thesis have already published in the form of a journal paper [10] in Journal ofApplied Physics. The experiment using field programmable gate array (FPGA) and very high speed integated circuit hardwaredescription language (VHDL) to deal with the system planning level and module design. It includes estimating the linear modulated equation in order to normally commute while the speed of the motor is decreasing, applying a digital filter to overcome the disturbed commutation signal caused by PWM signal, and attaching an anti-windup controller toimprove the speed response. As a result, the interioroperations of the FPGA chip accompany peripheral motor, six-bridge circuit, feedback current using AD and voltage sensing to construct and verify a 150° sensorless drive control system.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009512516
http://hdl.handle.net/11536/38235
顯示於類別:畢業論文


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