完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 陳志豪 | en_US |
dc.contributor.author | Chih-Hao Chen | en_US |
dc.contributor.author | 周復芳 | en_US |
dc.contributor.author | Christina F. Jou | en_US |
dc.date.accessioned | 2014-12-12T01:15:12Z | - |
dc.date.available | 2014-12-12T01:15:12Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009513606 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/38454 | - |
dc.description.abstract | 本論文探討應用於超寬頻與802.11a機收機的高頻混頻器之設計,其中分成兩個主題來探討。第一主題是混頻器之低功率低電壓以及改善閃爍雜訊之設計與分析。首先設計應用在超寬頻系統之低電壓低功率混頻器,利用PMOS與NMOS折疊式轉導級混頻器來達到低電壓的效果,再利用電容來各自偏壓來降低供應電壓,此供應電壓為1V。量測結果顯示,在供應電壓1V下,混頻器僅消耗2.9毫瓦,並且擁有3.1~10.6 GHz的頻寬,並且轉換增益在3.1~9.6 GHz中僅1 dB之變動,達到既平坦又寬頻之低功率低電壓混頻器。針對上述混頻器發現,應用在直接降頻混頻器下閃爍雜訊影響甚大,所以接著探討閃爍雜訊在混頻器中扮演的腳色。進一步將改善閃爍雜訊的技巧應用在上述混頻器中,量測結果顯示,在5.2 GHz (802.11a) 工作頻率下雜訊指數降低4 dB且轉換增益提升4.8 dB。 第二主題為超低功率混頻器之實現。模擬結果顯示在供應電壓為0.6V下,功率僅消耗0.57毫瓦,但增益為1.7 dB,雜訊指數為11.25 dB。經過適當的修改之後,一樣在0.6V供應電壓下,功率消耗0.42毫瓦,並且擁有5.2 dB之增益且雜訊指數為9.5 dB。 最後對於閃爍雜訊在混頻器中的影響提出新解決方案,電路架構也已完成初步構想,將作為此論文將來專題之研究。 | zh_TW |
dc.description.abstract | This thesis discusses high frequency mixer for UWB and 802.11a receivers and it mainly includes two parts. One is the analysis and design of low power low voltage mixer with flicker noise improved technique. First, the low power and low voltage mixer which utilizes folded transconductance stage including PMOS stacked on the top of NMOS is implemented for UWB system. Then the capacitor is used for NMOS and PMOS biasing by oneself to implement low supply voltage with 1V. The measured results reveal that this mixer consumes only 2.9 mW with 1V supply voltage and its bandwidth is 3.1~10.6 GHz. In 3.1~9.6 GHz, the variation of conversion gain is only 1 dB and the mixer achieves flat gain and broadband performance. In described above, flicker noise is strongly influenced and play an important role in direct conversion receivers. Flicker noise improved technique is adopted in above mixer. The measured results reveal noise figure is reduced 4 dB and conversion gain is increased 4.8 dB at 5.2 GHz (802.11a). In part two, the Ultra low power mixer is implemented. The simulated results reveal power consumption is only 0.57 mW, conversion gain is 1.7 dB, and noise figure is 11.25 dB with 0.6V supply voltage. After moderate modifying, power consumption is 0.42 mW, conversion gain is 5.2 dB, and noise figure is 9.5 dB. At the last, we propose the solution to solve the influence in mixers. The construct is completed and is treated as future work in our thesis. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 低電壓 | zh_TW |
dc.subject | 混頻器 | zh_TW |
dc.subject | low voltage | en_US |
dc.subject | mixer | en_US |
dc.title | 應用於超寬頻與802.11a無線射頻接收機之CMOS低功率低電壓及改善閃爍雜訊技術之混頻器與超低功率混頻器之設計與研究 | zh_TW |
dc.title | Design of CMOS Low Power Low Voltage Mixer with Flicker Noise Improved Technique and Ultra Low Power Mixer for UWB and 802.11a Wireless RF Receiver | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |