完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liu, Victor W. | en_US |
dc.contributor.author | Chen, Chiuyuan | en_US |
dc.contributor.author | Chen, Richard B. | en_US |
dc.date.accessioned | 2014-12-08T15:05:26Z | - |
dc.date.available | 2014-12-08T15:05:26Z | - |
dc.date.issued | 2007-10-01 | en_US |
dc.identifier.issn | 1382-6905 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1007/s10878-007-9065-5 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/3985 | - |
dc.description.abstract | All-to-all personalized exchange occurs in many important applications in parallel processing. In the past two decades, algorithms for all-to-all personalized exchange were mainly proposed for hypercubes, meshes, and tori. Recently, Yang and Wang (IEEE Trans Parallel Distrib Syst 11:261-274, 2000) proposed an optimal all-to-all personalized exchange algorithm for binary (each switch is of size 2x2) banyan multistage interconnection networks. It was pointed out in Massini (Discret Appl Math 128:435-446, 2003) that the algorithm in Yang, Wang (IEEE Trans Parallel Distrib Syst 11:261-274, 2000) depends on the network topologies and requires pre-computation and memory allocation for a Latin square. Thus in (Discret Appl Math 128:435-446, 2003), Massini proposed a new optimal algorithm, which is independent of the network topologies and does not require pre-computation or memory allocation for a Latin square. Unfortunately, Massini's algorithm has a flaw and does not realize all-to-all personalized exchange. In this paper, we will correct the flaw and generalize Massini's algorithm to be applicable to d-nary (each switch is of size dxd) banyan multistage interconnection networks. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | multistage interconnection network | en_US |
dc.subject | banyan network | en_US |
dc.subject | all-to-all communication | en_US |
dc.subject | all-to-all personalized exchange | en_US |
dc.subject | latin square | en_US |
dc.title | Optimal all-to-all personalized exchange in d-nary banyan multistage interconnection networks | en_US |
dc.type | Article; Proceedings Paper | en_US |
dc.identifier.doi | 10.1007/s10878-007-9065-5 | en_US |
dc.identifier.journal | JOURNAL OF COMBINATORIAL OPTIMIZATION | en_US |
dc.citation.volume | 14 | en_US |
dc.citation.issue | 2-3 | en_US |
dc.citation.spage | 131 | en_US |
dc.citation.epage | 142 | en_US |
dc.contributor.department | 應用數學系 | zh_TW |
dc.contributor.department | Department of Applied Mathematics | en_US |
dc.identifier.wosnumber | WOS:000248864800004 | - |
顯示於類別: | 會議論文 |