應用於運動偵測器與視覺彌補裝置之視網膜晶片之分析與設計

Abstract

本論文提出可應用於運動偵測器與視覺彌補裝置之視網膜晶片之架構與設計技巧，我們分析了這些技巧並將之運用於測試晶片之設計中。本論文包含以下之主要主題:(1)背景介紹、(2)由視網膜方向選擇神經節細胞膜型所建立之計算方法與依據該方法設計之仿生互補式金氧半二維運動方向偵測器、(3)應用於視覺彌補裝置之光二極體陣列視網膜晶片之設計與(4)應用於視覺彌補裝置之太陽能電流刺激視網膜晶片。 除了背景之介紹外，本論文之第一部分描述一由視網膜方向選擇神經節細胞膜型所建立之計算方法與依據該計算方法所設計之仿生互補式金氧半運動方向偵測器架構。此計算方法與偵測器架構係由視網膜方向選擇神經節細胞所得到，用以模仿該細胞之功能。此外，本論文提出了「邊緣數量正規化」與「仿隨機像素排列架構」兩種方法可增加方向計算之準確度。我們依據上述創新技術設計了一互補式金氧半測試晶片，並進行該晶片之量測。該晶片包含一32×32像素陣列，像素之尺寸為63微米平方，填充係數(fill factor)為12.8%。整體晶片之尺寸約為3.3×4.2毫米平方，晶片操作於3.3伏特，於黑暗暗中之待機功耗為9.9毫瓦，操作於10 MHz頻率時最高功耗最高為21毫瓦。不同的測試圖案被用來測試運動方向之偵測；實驗結果顯示，方向偵測之誤差小於11度，實驗結果證明本晶片可正常運作。由於本晶片具有即時與低功耗的偵測與運算能力，可應用於許多應用中。 論文的第二部分提出了一下視網膜彌補裝置之整合性架構，該架構包含一眼外影像擷取與投射裝置及一植入式視網膜晶片。該架構提供了一太陽能視網膜晶片之解決方案。運用此架構，脈波影像也可以很容易的產生。針對以光二極體陣列為基礎之植入式視網膜晶片，我們提出了環繞局部回歸電極與凸塊電極之設計，可以降低介面與組織阻抗，進而提升刺激電流，本論文也呈現軟體模擬之結果，評估局部回歸電極之效果。我們依據上述設計，製作了一測試晶片並進行離體動物實驗。經由胞外紀錄兔子的細網膜神經節細胞，可得知晶片之刺激閾值，實測之閾值約為39 μC/cm2， 為目前文獻所見之最低值。凸塊電極可進一步降低閾值至16.3 μC/cm2，更可將可操作頻率由10 Hz增至16 Ｈz。動物實驗驗證了本論文所提出之設計之有效性。 除了光二極體陣列為基礎之植入式視網膜晶片之設計，本論文亦提出一太陽能金氧半電流刺激晶片與植入系統之概念設計，可應用於下視網膜彌補裝置中。該晶片之基礎為「分區供電技術」，可提高刺激電流之效率。晶片採用了放置於浮接之Ｐ型基板（Substrate）之Ｐ＋/N-well光二極體結構作為太陽能電池，並將Ｎ通道金氧半場效應電晶體（ＮＭＯＳＦＥＴ）放置於浮接之深部N-well(DNW)中，以防止光電流之漏電，且可利用雙井（Ｔwin well）互補式金氧半製程將太陽能電池與互補式金氧半元件整合於同一基板中。測試晶片包含分成四區之4×4光二極體陣列與控制訊號產生電路。本論文亦探討了關於時脈之頻率、分區之數目與太陽能電池之數量之設計考量，並提出一分區供電視網膜晶片實際應用之概念設計。分區供電視網膜晶片之測試晶片利用0.18微米製程製作，尺寸約為1.350×1.315毫米平方。於15.8 mW/cm2強度之光照下，量測之四相位之控制訊號之頻率為150 Hz，時脈頻率為1.5 kHz，輸出刺激電流約為1.1微安培。實驗結果顯示晶片可正常運作。 最後本論文進行了本研究之總結，並提出未來相關研究進行之方向與工作事項。

In this thesis, system architectures and key design techniques for the retinal chips used in the applications of motion detection and visual prostheses are proposed. The thesis contains the following topics: (1) background introduction; (2) CMOS bio-inspired 2-D motion direction sensor based on a direction computation method derived from the directionally selective ganglion cells in the retina; (3) designs of photodiode array based retinal chip for subretinal prostheses; (4) design of solar-cell powered CMOS current stimulation chip for subretinal prostheses. A CMOS bio-inspired motion direction sensor structure and its associated computation method are proposed in the first part of the thesis. Both method and structure with excitation-inhibition operation are derived from the directionally selective ganglion cells (DSGCs) in the retina to mimic their functions. Edge-number normalization for direction calculation and pseudo-random tessellation (PRT) structure for pixel layout arrangement are also proposed to enhance the accuracy of the computation. An experimental chip based on the proposed method and structure has been designed, fabricated, and measured. The chip comprised 32×32 pixels with a pixel size of 63×63 □m2 and a fill factor of 12.8%. The total chip size is 3.3×4.2 mm2 and the power consumption is 9.9 mW in the dark and 21 mW at a maximum clock rate of 10 MHz with 3.3-V power supply. The fabricated chip has been measured with different moving patterns, and a computation error of less than 11 degrees has been accomplished. This verifies the correct functions of the proposed motion direction sensor. With the capability of real-time motion detection and processing under low power dissipation, the proposed sensor is feasible for many applications. A system architecture including an external goggle and an implantable retinal chip for subretinal prostheses are proposed. The architecture provides a solution to solve the problem of insufficient conversion efficiency of on-chip photodiodes. Moreover, pulse stimulation can be easily implemented with the proposed architecture. For the design of photodiode array based retinal chips, the surrounding local return and bump electrodes have been proposed to reduce interface and tissue impedance which could increase output stimulation current. Simulations have been performed with resistive network models for the evaluation of different designs of return electrodes. A test chip has been designed and tested in vitro with the rabbit retina. Extracellular recording of the ganglion cells shows that the threshold of stimulation without bump electrodes is 39 μC/cm2 which is almost the lowest values reported from in vitro studies. The threshold is further reduced to 16.3 μC/cm2 with bump electrodes. The operational frequency is improved about 60% to 16 Hz with bump electrode. The successful in vitro results have verified the functions of the chip with the proposed designs. In addition to the design of photodiode array based retinal chips, a solar-cell powered CMOS current stimulation chip and a conceptual design of implant system for subretinal prostheses are proposed and analyzed. The chip structure is based on the proposed Divisional Power Supply Scheme (DPSS) to improve the efficiency of output stimulation current. Both P+/N-well photodiode structure with floating P-substrate and NMOSET in P-well with floating deep n-well (DNW) are adopted to prevent photocurrent leakage and enable the integration of CMOS devices in a twin-well CMOS technology with DNW structure. The experimental chip consists of a 4×4 photodiode array with 4 divisions, a control-signal generator, and solar cells. Design consideration on clock frequency, number of divisions, and required number of solar cells as well as conceptual design of the whole implant system are described. The experimental chip has been fabricated in 0.18-μm CMOS technology. The chip size is 1.350 mm×1.315 mm. The measured frequency of four quadrature-phase control signals is 150 Hz with the clock frequency of 1.5 kHz under visible light intensity of 15.8 mW/cm2. The measured output stimulation current is 1.1 μA. The measurement results have verified the correct function of the proposed stimulation chip. The output current can reach 64 μA under the infrared (IR) source of 520 mW/cm2. With the same number of solar cells, the realizable pixel resolution is 2000 pixels. Both experimental and calculation results have indicated that the proposed DPSS architecture and subretinal implant system are promising for high resolution retinal prostheses. Finally, conclusions and future work are presented.