以新穎轉移技術製作單晶矽薄膜電晶體於玻璃及軟性基板之研究

Abstract

最近，軟性電子在各種應用如軟性顯示器、感應器、生醫元件、射頻辨識和主動式天線等方面獲得極大的注意。首先，我們將探討在軟性基板上製作薄膜電晶體的數個關鍵技術，如基板材料和背板技術等。在過去，非晶矽薄膜電晶體、低溫多晶矽薄膜電晶體、有機薄膜電晶體和透明薄膜電晶體已被應用於各式軟性電子；儘管如此，因受到不佳的微結構和低熔點基板的製程溫度限制，使得上述的電晶體特性並無法如同單晶矽薄膜電晶體般具有良好的特性。 近五年來，如何將單晶矽薄膜電晶體轉移並接合到軟性基板的技術正處於研究階段。然而，大部分的單晶矽薄膜電晶體轉移技術使用到昂貴的矽晶絕緣體(SOI)晶片。為了能達到在單晶、非矽晶絕緣體(低成本)的晶片上製作軟性電子的目的，我們研發出一種利用連續性的鍺/矽異質結構磊晶和以鍺選擇性蝕刻進行薄膜轉移的新穎技術。藉由鍺當作犧牲層，我們完成以一種簡單、可搭配一般互補型金屬氧物半導體製程的方式，在傳統矽晶圓上實現具有單晶矽薄膜電晶體的陣列之軟性薄膜，並將其轉移至目標的軟性基板上。為了比較，我們同時也將薄膜轉移至玻璃基板上。 由穿透式電子顯微鏡(TEM)和繞射圖對矽/鍺/矽三明治狀結構的分析中可發現最上層矽為單晶矽結構。轉移完成的P通道電晶體因其具有絕佳的結晶性，在導通時擁有較高的載子移動率(207 cm2 V-1s-1)和約104的開關電流比。但是在聚酰亞胺(Polyimide)軟板上，因為較差的表面粗糙度和柔軟而難以支撐探針的性質，N通道電晶體和P通道電晶體的載子遷移率在分別只有(54 cm2 V-1s-1)和( 3.03 cm2 V-1s-1)。有關利用鍺蝕刻轉移單晶矽薄膜電晶體到玻璃/塑膠基板的研究會在後面做更進一步的討論。 最後，我們將對鍺蝕刻掀去法(Ge etching lift off)作簡單的總結。利用此種技術應用於系統面板和軟性電子等，將可發揮極大的潛力。

Recently, flexible electronics have attracted a lot attention for their various applications in flexible displays, sensors, medical devices, RF identification, and active antennas. At first, we investigate the several key technologies such as substrate materials and backplane technologies for fabricating thin-film transistors on flexible substrates. Amorphous-silicon (a-Si) thin-film transistors (TFTs), low-temperature poly-Si (LTPS) TFTs, organic thin-film transistors (OTFTs) and transparent TFTs have been traditionally employed for flexible electronics, but their performances are not as good as single-crystalline Si (sc-Si) TFTs due to the poor microstructure and/or process-temperature constraint for the low-melting-point substrates. Single-crystalline Si TFTs that was transferred and bonded onto the flexible substrate with high carrier mobility have been researched in the last five years. However, most of the transfer techniques of sc-Si TFTs utilized high-cost silicon-on-insulator (SOI) wafers. To meet the both requirements of single crystal and non-SOI (cost-effective) host wafer, we developed a novel transfer technique with sequential Ge/Si heterostructure epitaxy and membrane-lift-off process via Ge selective etching, which is called as Ge-etching-lift-off technique. By utilizing the epitaxial Ge as a sacrificial layer, we have demonstrated a simple, CMOS-process-compatible process for the thin flexible membranes that fixed arrays of single-crystalline TFTs on conventional Si wafers. These membranes were then transferred to desired flexible substrates. For comparison, the transfer of membranes was also performed on glass substrate. From analyses of transmission electron microscope (TEM) and diffraction pattern for the epitaxial Si/Ge/Si sandwich structure, single-crystalline of the top Si layer was clearly observed. The transferred p-channel TFT exhibits high performance with a high mobility approaching 207 cm2 V-1s-1 and on/off ratios of ~104 due to its excellent crystallinity. However, due to the poor surface roughness and less support of probing, the mobilities of device on PI substrate were as low as 54 cm2 V-1s-1 for n-channel TFTs and 3.03 cm2 V-1s-1 for p-channel TFTs, respectively. Further Investigation of Single-Crystalline Si TFTs that been transferred onto Glass/Plastic Substrates with Ge Etching Lift-Off will be discussed later. In the end, conclusions concerning with the transfer technology via the Ge etching-lift-off scheme have been briefly summarized. Such a technique is promising for the applications in the system on panel (SOP) and flexible electronic systems.