使用適應性電壓位準技術以減小右半平面零點效應之直流-直流升壓電壓電源轉換器

Abstract

在傳統的升壓轉換器電路中，輸出電壓之暫態響應時間被所熟知的系統右半平面零 點所限制。為了解決這個問題，本篇論文提出一個使用適應性電壓位準技術設計之快速 直流-直流升壓電壓轉換器以降低右半平面零點的效應。在過去使用適應性電壓位準技 術的設計中，常數輸出阻抗是一個重要的設計原則。然而，出現在升壓轉換器電路的系 統轉移函數之右半平面零點，使得升壓轉換器難以達成常數輸出阻抗的特性。在本篇論 文所提出的交流特性調適技術展示了如何在升壓轉換器中的到一個相對常數輸出阻抗 以及達成適應性電壓位準特性。和傳統架構比較，使用適應性電壓位準技術設計之升壓 電路在暫態響應上具有更短的回穩時間以及更小的電壓突波。模擬結果顯示了在電流負 載從100mA變化到400mA時，輸出電壓做到了比4us 更短的回穩時間以及40mV的電 壓壓降。 另一個使用適應性電壓位準技術之設計挑戰在於補償方法。因其多迴授路徑的架 構，其迴路增益函數相當複雜。本篇論文將詳細分析它的小訊號模型、迴路增益函數以 及推導出其補償方法。 本篇論文所提出的升壓轉換器，輸入電壓為2.5V，輸出電壓為5V。其中回授控制電 路以脈波寬度調變之方式實現。回授控制電路之電源電壓源範圍為2.5 伏特到3.6 伏特。 最佳效率在負載電流為400 毫安培時可達93%。本論文之設計使用TSMC 0.25um 嵌入 高壓5V 1P4M CMOS製程技術進模擬與製作。

The transient response time of conventional boost is limited by the well-known right-hand plane (RHP) zero. To relieve this problem, the fast boost DC-DC converter designed with adaptive voltage positioning (AVP) technique to minimize the right-half plane zero effect is proposed. The concept of constant output impedance is a universal design principle in former works with AVP design. However, the RHP zero appear in control to output transfer function of boost converter obstruct achievement of constant output impedance. The AC adjusting skill proposed in this paper illustrates how to obtain relative constant output impedance and accomplish the AVP characteristic in boost converter. The boost converter design with the AVP technique provides much faster response time and smaller voltage overshoots or undershoots during the load transient compared with any control scheme presented before. The simulation results is presented to show excellent performance of faster than 4us response time and the 40mV voltage drop when the load current is varied from 100mA to 400mA. Another focus in AVP control boost converter design is the compensation method. Because of its multi-loop structure, the function of loop gain of boost converter with AVP technique is complicated. The thesis will show the detail analysis in small signal model, function of loop gain and compensator design for boost converter with AVP control. The presented boost converter has been designed with 2.5V input voltage and 5V output voltage. The feedback control circuit is realized by a pulse width modulation (PWM) control method. The supply voltage of the controller is in the range from 2.5V to 3.6V. The best efficiency of the converter is 92% at 300mA load current. This converter design is simulated and fabricated in TSMC 0.25μm embedded high voltage 5V 1P4M CMOS technology.