批次統一預測控制於具有時間延遲之半導體製程的穩定度與性能分析

Abstract

近年來，批次控制(Run-to-Run Control, RtR)基於指數加權移動平均(Exponentially Weighted Moving Average, EWMA) 與雙重指數加權移動平均(Double-EWMA, DEWMA)已經在半導體製程中獲得廣泛的應用。一般批次控制器的設計必須對於模 型誤差(Model Mismatch)與不確定性(Uncertainties)以及時間延遲問題皆具備穩健 性。本文藉由多項式的表示法提出一種批次統一預測控制(Run-to-Run unified predictive control, RtR-UPC)架構。透過對RtR-UPC做適當的參數設定，證明RtR-UPC 為廣義的EWMA 與DEWMA 控制器。更進一步針對RtR-UPC 架構之穩定度與性能 對於時間延遲之製程進行深入討論。 另外，在考慮六種典型隨機干擾下(White Noise, RW, ARMA(1,1), IMA(1,1), DT and RWD)，利用RtR-UPC 架構推導閉迴路響應以檢驗其性能。透過漸近期望值 (Asymptotic Mean) 、漸近變異數(Asymptotic Variance, AVAR) 與漸進均方誤差 (Asymptotic Mean Square Error, AMSE)作為性能的參考指標。基於的特定隨機干擾 下，使具備時間延遲之製程輸出AMSE 值最小的最佳權重也在本文中被討論。最 後，我們提出一種隨批次切換(Switching)的控制機制，以變動的最佳權重來獲得全 域最佳性能。並透過一些模擬例子顯示RtR-UPC 架構具備更佳的閉迴路系統響應與 特性。

In the last few years, the Run-to-Run (RtR) control based on Exponentially Weighted Moving Average (EWMA) or Double Exponentially Weighted Moving Average (DEWMA) controller have gained popularity in the manufacturing of semiconductors. The RtR controllers are designed to be robust with respect to model mismatch, uncertainties and delay problem. In this thesis we proposed a RtR unified predictive control (RtR-UPC) framework by using polynomial approach. A theoretical analysis of RtR-UPC properties based on discrete control theory is also provided. Based on some specified parameters settings, the RtR-UPC controller can be stated as a generalized case of EWMA and DEWMA schemes. Furthermore, the completely robust stability and performance analysis with and without delay problem of RtR-UPC is discussed. Also, we utilize this RtR-UPC scheme to derive the closed-loop response of process under six-typical stochastic disturbances (White Noise, RW, ARMA(1,1), IMA(1,1), DT and RWD) and to examine the performance of RtR-UPC. The asymptotic mean, asymptotic variance (AVAR) and the asymptotic mean square error (AMSE) are used to be the reference performance indices. For these specified stochastic disturbances, the corresponding optimal weights which minimize a process output AMSE of the process with and without delay are also discussed. Finally, we proposed a switching mechanism to integrate the transient and steady-state performance results. Through the switching with runs, the compromise total performance can be achieved. Some simulation results are given in the end of this thesis to show a property of RtR-UPC scheme.