微型加熱器設計與熱管理改善應用於射頻功率元件之覆晶構裝結構

Abstract

隨著半導體科技的快速發展，電子產品朝向低成本、高性能、微型化及多功能使用的方向前進，然而高性能與微型化的元件設計卻會產生嚴重的散熱問題。尤其高功率射頻元件在運作時會散發大量的熱，散熱問題將會進一步限制高功率射頻元件的性能，因此需要更有效的散熱管理方式來幫助散熱以避免元件性能因高熱而衰減。 合適的封裝技術可有效的提升散熱，利用覆晶封裝技術將可同時減小封裝尺寸及擁有良好的散熱特性。在本篇論文中，將研究不同數量、形狀及擺設之散熱凸塊樣式，並利用ANSYS 模擬軟體對論文中所提出的散熱凸塊設計作熱模擬，預測最佳的散熱結構。至於晶片部分，在此提出一種新穎的方法評估使用上述散熱凸塊設計後的改善，也就是在晶片端製作微型加熱器仿效真正高功率射頻元件的發熱情形，而不用真正的高功率射頻元件。 實驗與熱模擬結果，證實微型加熱器有加熱到 300℃ 以上的能力。熱效能上散熱凸塊數量越多、與晶片接觸面積越大及擺設越靠近熱源，會得到較佳的散熱結果。實驗結果中，我們看到覆晶封裝在最 佳散熱凸塊樣式後，在氧化鋁基板上最高有41 %的改善，在氮化鋁 基板上有59 % 的改善。而填完底膠後，在氧化鋁基板上最多提高到 有54 % 的改善，在氮化鋁基板上也提高到有65 % 的改善。且所有 實驗結果皆能夠以本研究提出的等效熱電路模型來得到合理的解釋。 同時，利用與符合50 歐姆共平面波導傳輸線之覆晶封裝做40 GHz 的S 參數量測，發現本研究所使用的散熱凸塊樣式設計在反射損失及介入損失大致上皆相近(-10 dB 及-1.25 dB)，所以期許散熱凸塊樣式設計未來能夠應用在射頻功率元件的封裝技術上，幫助散熱而不影響高頻表現。

With the fast development of semiconductor technology, the trend for electronic products is low cost, high performance, size miniaturization and multi-functional usage. However, the high power performance and small size have brought about a serious issue, i.e. heat dissipation, and it will limit the performance of high power RF device. Hence effective thermal management is needed to avoid the degradation of the devices. At present, flip-chip is considered as a promising packaging technique which possesses both small size and good heat dissipation. In this thesis, different numbers, shapes and arrangements of flip-chip thermal bump patterns were fabricated. The ANSYS simulation software was also applied to these bump patterns for thermal analysis. As to the chip side, a novel approach is proposed to evaluate the improvements of the thermal bump designs, which is fabricating the micro-heater structure on the chip to simulate the heat generation of high frequency power devices. Based on the experiment and simulation results, micro-heater was proved to have the ability of heating over 300 ℃. The thermal performance of the flip-chip packages can be improved by adding more bumps, enlarging contact area between bump and chip, or putting bump near the heat source. After applying flip-chip packaging with the best thermal bump pattern in this thesis, 41 % and 59 % thermal improvements were achieved on Al2O3 and AlN substrates respectively. And after underfilling, the thermal improvements were even higher: 54 % and 65 % thermal improvements were achieved on Al2O3 and AlN substrates respectively. Also, all the experiment results can be explained by the equivalent thermal circuit model which has been established in this research. Meanwhile, 50 ohm impedance matched coplanar waveguide through line was used to evaluate the RF performance of the designed bump patterns. From the experimental results, the return loss and insertion loss of different bump patterns displayed similar peaks (-10 dB and -1.25 dB), which demonstrates the applicability of thermal bump patterns to high frequency power devices.