低溫微波退火應用之研究

Abstract

在博士論文中，我們針對新穎的低溫微波退火技術應用於薄膜電晶體元件之研究。首先，以元件的製做來說，因為元件的尺寸越來越小，所以如何找到一種讓摻雜活化的方式是很重要的。在本研究中將介紹新穎的低溫微波退火(microwave annealing)技術，並且分析微波退火與傳統高溫退火的應用比較。因為在活化製程上，微波有別於傳統的快速退火方式，它不但可以利用低溫活化，還可以降低短通道效應，所以微波的應用於活化也會是製程上的新選擇。除此之外，因為微波活化不是利用高溫退火，所以並不會有擴散太深的問題，因此可以簡單製造出超淺接面的結構，以利更小尺寸的元件。在本研究中，我們同時利用電子束微影(E-beam lithography)完成65奈米的薄膜電晶體元件製做，並且測量其電性方面的優劣。於同一部分實驗，我們將多晶矽閘極換成金屬閘極，並利用微波退火系統，研究金屬閘極於微波下的影響。此外，同時我們也藉由非晶矽薄膜電晶體，以研究微波對於晶向結晶的實驗，並發現微波退火的結晶的溫度 (480oC)與結晶時間(30分鐘)，遠低於傳統爐管退火 (600oC 24hr)。 並發現微波退火的元件，可以將電子遷移率提高至3.34 cm2/V-s。此外，我們利用電子束微影技術，縮小了非晶矽薄膜電晶體的尺寸，有效的增加了於LCD應用時的開口率，也大大增加產品效能。 另一方面，我們首次利用微波退火系統，活化碳化矽結構。屏除複雜的碳化矽磊晶系統，我們利用離子佈值的方式，在晶向(100)與(110)的矽基板上植入碳原子或碳團原子，並利用低溫微波去結晶，並觀測其碳原子取代晶格點的比率，我們發現利用微波製成可將碳原子與矽原子的比率，提高至 1.556%，以增加收縮的應力，進而提高N型金氧半電晶體的特性。而離子佈值的方式，製程方式既簡單又方便，而低溫微波退火，又不受結構的影響，可進行良好的退火製程。此外，我們也發現微波活化，可在低溫的環境中，加強氮化矽薄膜的應力。並不會傷害底材的條件與結構，對於提高N型金氧半電晶體有很大的幫助。若是加上先前的碳化矽結構應用於源極與汲極的部分，並加上後部份氮化矽薄膜的應力，我們認為提高N型金氧半電晶體的特性，一定有很大的助益。 最後，我們也預測未來微波用於元件製做的重要性。

In view of the scaling of integration-circuit (IC) devices in the future, the issue of dopant activation efficiency is a major concern. In this thesis, a new microwave annealing approach was investigated, and then the comparisons of the applications between microwave annealing and conventional high temperature annealing were also discussed. Microwave annealing is normally conduced at relatively low temperature annealing. Such low-temperature microwave activation not only significantly suppresses dopant diffusion but also reduces the short channel effect, which is a new option in annealing processes. Based on this low temperature annealing approach, an ultra-shallow junction structure could be attained easily, facilitating the development of nano-scaled devices. Then, we used e-beam lithography to fabricate 65 nm-scaled thin film transistors, and then measured the electronic characteristic. In addition, we also used the microwave annealing to activate the metal gate thin film transistors, and studied the impacts of microwave for metal. Then, we first use microwave annealing method to form the structure of SiC. The wafers were implanted by the species of single carbon or carbon cluster in orientation (100) and (110) silicon substrate to replace the difficult embedded process. We could enhance the concentration of substitial carbon ([C]sub) up to 1.556%, and it could enhance the strain stress to improve the performance at nMOSFET device. The ion implantation is an easier and convenient method, and microwave annealing is a low temperature process and don’t degrade the device structure and material. In addition, microwave could strengthen the tensile strain at low temperature process. Carbon implantation at source/drain with using microwave annealing to crystallize the SiC structure is a good way to improve the performance of nMOSFETS. Then, use low temperature SiN tensile strain to use SMT or CESL fabrication after the gate process. In addition, by combining this two techniques could improve the nMOSFET performance.