完整後設資料紀錄
DC 欄位語言
dc.contributor.authorKawachi, Toshihideen_US
dc.contributor.authorFudo, Hidekimien_US
dc.contributor.authorIwata, Yoshioen_US
dc.contributor.authorMatsumoto, Shunichien_US
dc.contributor.authorSasazawa, Hideakien_US
dc.contributor.authorMori, Tadayoshien_US
dc.date.accessioned2014-12-08T15:05:46Z-
dc.date.available2014-12-08T15:05:46Z-
dc.date.issued2007-08-01en_US
dc.identifier.issn0894-6507en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TSM.2007.901831en_US
dc.identifier.urihttp://hdl.handle.net/11536/4296-
dc.description.abstractHigh performance analog (HPA) CMOS devices with multiple threshold voltages have been successfully fabricated in a 0.13-mu m logic-based mixed-signal CMOS process on a single chip. The HPA devices demonstrate superior drivability, dc gain, matching, and reliability using an optimized halo and lightly doped drain (LLD) engineering approach combined with a unique dual gate oxide module for aggressive gate oxide thickness scaling.en_US
dc.language.isoen_USen_US
dc.subjectfocusingen_US
dc.subjectphotolithographyen_US
dc.subjectresistsen_US
dc.subjectscatterometryen_US
dc.titleHighly sensitive focus monitoring on production wafer by scatterometry measurements for 90/65-nm node devicesen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1109/TSM.2007.901831en_US
dc.identifier.journalIEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURINGen_US
dc.citation.volume20en_US
dc.citation.issue3en_US
dc.citation.spage222en_US
dc.citation.epage231en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000248669800006-
顯示於類別:會議論文


文件中的檔案:

  1. 000248669800006.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。