銅閘極搭配氮化鉿擴散阻擋層之金氧半電容研究

Abstract

隨著元件線寬的縮小，用傳統的複晶矽閘極所製作出來的元件特性已不能滿足對於元件品質的要求。有許多的研究指出利用金屬閘極來取代複晶矽閘極可以避免掉許多問題。所以使用金屬閘極已經成為了在元件線寬縮小過程之中的一種趨勢。銅有著電阻係數低的特性，所以可以利用來當作閘極的金屬材料。但是銅在半導體製程中會造成嚴重的污染問題，因此我們需要一個阻擋層來阻止銅離子擴散到介電材料跟矽基板。而氮化鉿的熱穩定性佳且結構緻密，如果應用在做為銅的擴散阻擋層，將會是個非常適合的擴散阻擋層材料。 在本實驗中，我們利用銅來當作閘極的材料並搭配上氮化鉿來作為阻擋層。在電性跟可靠度的量測資料中可以看出，當氮化鉿的厚度超過25奈米的時候，在電性跟可靠度上的表現幾乎是相差無幾的。但是當氮化鉿的厚度降至20奈米時，可靠度上的表現就變差了一些。從二次離子質譜儀的分析資料中我們可以得知，造成可靠度下降的主要因素在於銅離子擴散到介電材料之中而影響到電容的特性。在這同時，我們也比較了擁有28奈米氮化鉿或34奈米氮化鉭阻擋層的銅閘極電容的可靠度。我們發現擁有28奈米氮化鉿阻擋層的銅閘極電容的可靠度表現會比擁有34奈米氮化鉭阻擋層的銅閘極電容要好。接著我們也發現了對於使用銅閘極和28奈米氮化鉿阻擋層的電容結構來說，攝氏四百度、氮氣環境下三十分鐘的爐管退火是個很適合的熱退火條件。在這個條件下可以移除掉部分製程中所產生的氧化層電子與缺陷，而且不會降低電容的可靠度。但是當熱退火溫度超過五百度時，電容的可靠度就會受到影響，所以不適合用在這個結構的製程。

Accompany with the scaling down of the devices, the conventional polysilicon gate can not satisfy the performance requirements of the integrate circuits. Many researches indicated that using metal gate to replace the polysilicon gate can eliminate many issues, such as the poly depletion, boron penetration, and the RC delay. Using metal to be the gate electrode is the trend to promote the performance of MOSFETs when the devices scaling down. Copper has lower resistivity and suits to be the gate electrode. But copper has serious contamination problems for device applications. Thus we need a diffusion barrier to block copper ions diffusion into the dielectrics and the silicon substrate. In respect of the thermal stability and high density, HfN is a candidate material to be the diffusion barrier. In our experiments, we use the copper as the gate electrode and the HfN as the diffusion barrier of copper. We can find the electrical properties and reliability are almost identical when the thickness of HfN is over 25 nm, and degraded when the thickness of HfN is down to 20 nm. According to the SIMS analysis data, we found the copper ions diffusion into the dielectric is the main reason why the electrical properties and reliability were degraded. It also proves the HfN layer can block the diffusion of copper ions. We also compare the reliability of copper gate MOSCAPs with 28-nm-thick HfN and 34-nm-thick TaN diffusion barriers. The copper gate MOSCAPs with 28-nm-thick HfN diffusion barrier shows better reliability than that with 34-nm-thick TaN diffusion barrier sample. Afterwards, we found the 400°C furnace annealing in N2 ambient for 30 minutes is a suitable condition for the copper gate MOSCAPs with HfN diffusion barrier. The 400°C annealing can remove the plasma induced oxide charge and did not degrade the reliability of copper gate MOSCAPs with 28-nm-thick HfN diffusion barrier. When the annealing temperature was increased over 500°C, the copper ions will diffusion into the dielectrics and the reliability will be degraded.