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dc.contributor.author戴俊智en_US
dc.contributor.authorTai, Chun-Chihen_US
dc.contributor.author陳昌居en_US
dc.contributor.authorChen, Chang-Jiuen_US
dc.date.accessioned2014-12-12T01:34:13Z-
dc.date.available2014-12-12T01:34:13Z-
dc.date.issued2009en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079655609en_US
dc.identifier.urihttp://hdl.handle.net/11536/43415-
dc.description.abstract現在來說,嵌入式多媒體系統和數位訊號處理器是非常廣泛的被使用到,並且應用在許多地方。並且由於現在多媒體的影像畫質越來越好,相對的,所需要的資料量也就伴隨著越來越大。而一般來說,影像處理在一個數位訊號處理器上,常常需要非常大量的資料量,而這龐大的資料量必須被儲存在外部的記憶體,由於數位訊號處理器的內部快速記憶體是有限的原因。而處理器直接在外部記憶體處理資料,通常會有不好的效能影響。所以資料必須從外部記憶體搬運到內部記憶體。因此有效率的從外部記憶體將資料搬運到內部記憶體,就顯的相對的非常重要。 因此我們提出一個降低直接記憶體存取控制器內的延遲時間的方法,而這個設計方法就是讓不同通道之間的轉換時間和計算搬運位置的時間平行的同時執行,以降低浪費的時間,讓整個直接記憶體存取控制器能夠有效率的將資料搬運資料,藉此提升直接記憶體存取控制器的效能,當用在數位訊號處理器上時,也希望能提升處理器的效能。zh_TW
dc.description.abstractBecause embedded multimedia systems and digital signal processors are used popularly and apply many wide range. Because the quality of multimedia image becomes more and more higher, multimedia image carry enormous amount of data. In general, image processing on a digital signal processor often requires a lot of image data to be stored in external memory, because the size of fast internal memory is usually very limited. The efficient data transfer becomes very important. We present a method that reduced latency of direct memory access controller. The design is that digital signal processor processing should be overlapped with direct memory access controller processing. Therefore, this design reduced 90% the internal latency of direct memory access controller maximally and improved performance.en_US
dc.language.isoen_USen_US
dc.subject非同步zh_TW
dc.subjectasynchronousen_US
dc.title低延遲非同步直接記憶體存取控制器之設計zh_TW
dc.titleLow-Latency Design for Asynchronous DMA Controlleren_US
dc.typeThesisen_US
dc.contributor.department資訊科學與工程研究所zh_TW
Appears in Collections:Thesis


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