非同步8051微控器之解碼器設計

Abstract

近來可攜式裝置的使用越來越普遍，因此低耗電的設計成為重要的目標，由於資料驅動的特性使得非同步電路適用於低耗電設計，我們會提出一個新的非同步8051微控制器的解碼器設計，這是由於8051是最普遍使用的解碼器之一，而且往往在其應用上低耗電特性是相當重要的。 此電路設計使用Balsa語言，一種以CSP (Communication Sequential Process)為基礎的非同步電路硬體描述語言並且可以合成非同步電路，由Balsa可以合成適用於Xilinx合成器的Verilog netlist，我們可以比較非同步與同步電路在Xilinx FPGA上的表現或是利用其他CAD工具進行模擬或LAYOUT實做

Recently mobile devices have been popularly used, and low power is becoming an import subject. With the data-driven feature, the asynchronous circuit is suited to be used for low-power design. We will propose a novel decoder design of the asynchronous 8051 microcontroller because the 8051 is one of the most popular microcontroller and is often used in applications where low energy consumption is important. The circuit is a complied VLSI-program, using Balsa as VLSI-programming language which is a CSP-based asynchronous hardware description language and synthesis tool. A Verilog netlist for XST (XILINX Synthesis Tool) is generated by Balsa. We will compare asynchronous 8051 and synchronous 8051 in XILINX FPGA and then use Cadence tools and Synopsys tools to synthesis the layout of the circuit.