管線化非同步PIC18微控制器之實作

Abstract

非同步的電路設計可以很自然的解決同步電路設計的缺點,像是頻率歪斜,耗電量,..等等的問題.但是目前使用非同步電路設計最大的問題就在於能使用的輔助設計工具不夠多. PIC18是由Microchip公司所開發出來的一系列8位元RISC架構的微控制器.應用於許多嵌入式系統的設計. 我們的目標就是利用非同步電路的方式設計出與PIC18指令集相容的微處理器. 同時也加入了管線的設計,以增加處理器的效能. 設計的工具我們選擇使用Verilog HDL. 最後我們模擬及驗證設計的正確性以效能.

Asynchronous design has a potential of solving some problems in synchronous design, such as clock skew and higher power consumption. However, the difficulty for asynchronous design is lack of CAD tools. PIC18 is a serious of the 8-bit RISC architecture microcontroller developed by Microchip Technology Inc.. It is widely used in many embedded system designs. Our goal is to design an asynchronous microprocessor compatible with PIC18 instruction sets. To increase the performance, the processor uses micropipeline design style. The design tool we choose is Verilog. Finally, the simulations show the correctness of the function and performance of its operation.