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dc.contributor.author蔡宗哲en_US
dc.contributor.authorTsai, Tsung-Cheen_US
dc.contributor.author鄭晃忠en_US
dc.contributor.authorCheng, Huang-Chungen_US
dc.date.accessioned2014-12-12T01:37:06Z-
dc.date.available2014-12-12T01:37:06Z-
dc.date.issued2010en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079711508en_US
dc.identifier.urihttp://hdl.handle.net/11536/44207-
dc.description.abstract相較於現行直接利用矽晶圓製作的太陽能電池,利用薄膜複晶矽製作的太陽能電池可有效的減低成本。但由於薄膜複晶矽的晶粒較小而造成在晶粒邊界大量的覆合電流,以及由於厚度較薄造成較低的光吸收率,這些問題均仍待進一步研究並克服以期能達到更有效率的薄膜複晶矽太陽能電池。其中,增加晶粒大小是解決問題的方式之一,因其可使晶粒邊界減少以降低在晶粒邊界造成的載子覆合,進而增進複晶矽太陽能電池的效率。直接沉積複晶矽於非矽基板上可以很容易的得到複晶矽薄膜,但直接沉積會導致其晶粒過小而造成前述問題。因此,為了得到較大的晶粒,已有許多不同使矽結晶的方式被研究。在本篇論文中我們利用固相結晶法以及鋁誘發結晶法來得到我們所需的複晶矽材料。利用鋁誘發結晶法可得到相當大的晶粒大小(1~50μm),但因為鋁誘發結晶法會使產生的複晶矽中有鋁元素的參雜(參雜濃度約為1×1018 cm-3),同時也因為利用此法產生的複晶矽層厚度無法達到吸收層所需厚度,因此直接利用鋁誘發結晶法並無法得到太陽能電池的吸收層。欲製作此吸收層,則必須利用在鋁誘發結晶法生成的晶種層上做磊晶而得到。以此法製作的優點是一方面在製作晶種層時,我們可以致力於使晶粒大小盡可能的大而不需要考慮參雜濃度對於吸收層效能的影響,另一方面在磊晶製作吸收層時控制我們所需的參雜濃度以期得到最好的效能。然而,利用鋁誘發結晶法製作的晶種層因具有高密度的電活性晶粒內缺陷,而使得其太陽能電池的效率並未如預期的隨著晶粒大小增加而增加。這些缺陷的電活性推測可能是由於機台(E-gun)中存在的銅元素汙染所造成的。因此,我們利用固相結晶法製作晶種層以用來做不同潔淨度的比較。 我們利用兩種不同的機台來沉積固相結晶法的晶種層,除了和鋁誘發結晶法使用相同的機台(E-gun)外,也利用較無金屬汙染可能的機台(PECVD)來沉積產生固相結晶法的晶種層。同時,退火條件、參雜濃度等亦均以不同條件測試以期能達到較大的晶粒大小。於本論文中晶粒大小多小於1μm。此份論文內製作的太陽能電池主要製作於三種不同的晶種層上,此三種晶種層分別為鋁誘發結晶法製作的晶種層、含有金屬汙染以固相結晶法製作的晶種層、以及不含有金屬汙染以固相結晶法製作的晶種層。製作在鋁誘發結晶法晶種層上的太陽能電池擁有最高的效能,其最高效能的轉換效率為4.7%、開路電壓為503mV、閉路電流為12.9 mA/cm2。次者,利用無金屬汙染的固相結晶法晶種層製作的太陽能電池擁有3.5%的轉換效率、486mV的開路電壓以及9.7 mA/cm2的閉路電流。另外,利用含有金屬汙染的固相結晶法晶種層製作的太陽能電池的效能最低,其轉換效率為3.1%、開路電壓為469mV、閉路電流為9.2 mA/cm2。利用鋁誘發結晶晶種層製作的太陽能電池之所以擁有較高的效能是因為其複晶矽層具有非常大的晶粒,其晶粒大小為固態結晶法形成之晶粒大小的二十倍。僅比較兩種由固相結晶法晶種層形成之太陽能電池時我們發現,沒有金屬汙染的太陽能電池效能確實是優於含有金屬汙染的太陽能電池,這是由於減少了不必要的金屬汙染而使得電活性晶粒內缺陷的數目減少進而改善效能。 綜合以上所述,本論文證明了增加複晶矽的晶粒大小確實可以增進太陽能電池的效率,另外,減少存在於複晶矽中不必要的金屬汙染亦可以增進太陽能電池的效能。同時,利用在晶種層上磊晶成長的複晶矽吸收層,高轉換效率的薄膜複晶矽太陽能電池將指日可待。zh_TW
dc.description.abstractPhotovoltaic solar cells based on a thin layer of polycrystalline silicon are a low-cost alternative for the current wafer-based silicon solar cells. Because of their small grain size, the large recombination current at the grain boundaries and the low absorbance of the light in the thin polycrystalline silicon layer, it is really challenging to obtain a good performance of these cells. An increased pc-Si solar cell performance is expected with increasing grain size because the number of efficient recombination centers, present at grain boundaries, decreases. Direct deposition of silicon on a non-silicon substrate however results in amorphous or small-grained material. To fulfill the demand of relatively large grains, different methods to crystallize silicon are being investigated. Two possible ways, aluminum induced crystallization (AIC) and solid phase crystallization (SPC), were adapted in this work. AIC has the advantage of promising large grains (1~50μm). But since as-formed AIC layers have an intrinsic aluminum doping density of around 1×1018 cm-3 and cannot be made thick enough, it is not possible to directly use them as the absorber layer for a solar cell. Absorber layers can however be obtained by epitaxial thickening of the AIC seed layers. Here we call it two step process which represents the method we formed our pc-Si layer. By using this two step process, we can grow larger grain sizes and solely control our crystalline property without considering the effect of doping concentration which is needed in the absorption layer of solar cell. However, the high density of electrically active intra-grain defects present in the AIC seed layer makes the solar cell performance quasi independent with the grain size. These electrically active intra-grain defects were caused by the possible copper contamination existing in our system during seed layer deposition. This problem has no clear way to solve yet. Thus, the SPC seed layers were made as a comparison with the AIC seed layers. Different deposition equipments (with or without possible metal contamination), annealing conditions and doping levels were investigated in this work in order to maximize the grain size (<1μm) of SPC seed layers. We fabricated our solar cells on mainly three different types of seed layer, namely AIC with metal involved, SPC with metal contamination involved, and SPC with metal contamination not involved. The solar cells made on the AIC seed layers have the highest efficiency about 4.7% with open circuit voltage of 503 mV and short circuit current of 12.9 mA/cm2 in this work. This superior performance over solar cells made on SPC seed layers were due to the much larger grain sizes of its polycrystalline silicon body even though metal contamination was involved. The efficiency was 3.5% with open circuit voltage of 486 mV and short circuit current of 9.7 mA/cm2 for the solar cells fabricated on SPC seed layers with metal contamination not involved. And the efficiency was 3.1% with open circuit voltage of 469 mV and short circuit current of 9.2 mA/cm2 for the solar cells fabricated on SPC seed layers with metal contamination involved. From these values we can see that the performance of solar cells made on SPC seed layers which were metal contamination not involved showed better results than those metal contamination involved. This improvement of the performance is because of the limitation of unwanted metal contaminations among the pc-Si layer, thus reduce the amounts of electrically active intra-grain defects. To sum up, this work has proved that increasing the grain size of pc-Si layers can improve the solar cell performance. Also, limitation of unwanted metal contaminations in the pc-Si seed layer can improve the performance of our pc-Si solar cells. As a result, with the two step process (seed layer and epitaxial growth), large grain thin film pc-Si solar cell with high efficiency could be expecteden_US
dc.language.isozh_TWen_US
dc.subject太陽能電池zh_TW
dc.subject多晶矽zh_TW
dc.subject鋁誘發結晶法zh_TW
dc.subject固相結晶法zh_TW
dc.subjectSolar Cellen_US
dc.subjectPoly-siliconen_US
dc.subjectAICen_US
dc.subjectSPCen_US
dc.title複晶矽應用於太陽能電池之研究與最佳化zh_TW
dc.titleStudy and Optimization of Polycrystalline Silicon Layers for Solar Cell Applicationsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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