漣波抑制電路運用於 GSM/DCS/WIMAX/WLAN 之多頻帶頻率合成器

Abstract

本論文提出一全積體化之多頻帶頻率合成器搭配漣漪抑制電路於單一迴路，以CMOS 0.18微米製程來實現。本頻率合成器是設計予GSM/DCS/WIMAX/WLAN(802.11a/b/g)系統運用於以IQ相位為主體的收發機。此提出的頻率合成器搭配漣漪抑制電路可減小控制電壓漣漪的振幅，來達到百萬分之3.45伏於鎖定時間13.5微秒。本頻率合成器相對於傳統方式設計的頻率合成器在參考雜訊能量譜抑制31.4dB，在峰到峰抖動方面有百分之74的改善量。頻率合成器裡的四相位壓控振盪器的量測結果得到相位雜訊於偏移頻率1MHz處有-123.38dBc/Hz，其FOM為-179dBc/Hz。

A fully integrated multi-band frequency synthesizer implemented in CMOS 0.18μm process with the ripple-free circuit in a single loop is presented in this thesis. The synthesizer is designed for GSM/DCS/WIMAX/WLAN (802.11a/b/g) systems applying to IQ phase based transceivers. The proposed synthesizer with ripple-free circuit can reduce the amplitude of control voltage ripple to 3.45 μ V in locking time of 13.5μs. The synthesizer performs the suppression of 31.4dB in the power spectrum of reference-spur and the peak-to-peak jitter with 74% improvement compared to conventional single loop synthesizer designs. The measurement result of the QVCO in the frequency synthesizer has the phase noise performance of -123.38dBc/Hz at offset frequency 1MHz, and the FOM is -179dBc/Hz.