標題: 一個使用前景式校正14位元每秒1億次取樣之電流導向式數位類比轉換器
A 14-bits 100-MS/s Current-Steering D/A Converter with Foreground Calibration
作者: 王毓賢
Wang, Yu-Shian
洪浩喬
Hong Hao-Chia
電控工程研究所
關鍵字: 數位類比轉換器;電流導向式;校正;DAC;Current-steering;Calibration
公開日期: 2011
摘要: 近年來,類比數位轉換器與數位類比轉換器在高效能系統中越來越重要,電路速度及解析度的要求也日漸增加。因此,如何在高速數位類比轉換器的設計上去減少電路中靜態與動態非線性效應對電路的影響,使INL、DNL和SFDR等參數誤差值降低,增加解析度便成了一個非常重要的議題。本論文提出一個具備前景校正功能之14位元每秒1億次取樣的數位類比轉換器的設計。在高速的應用中,使用電流導向式(Current Steering)數位類比轉換器是一個很好的實現方式,但是製程因素的影響導致高解析度的數位類比轉換器最多只能達到12位元,因此我們提出一個前景式的校正方式,將受製程影響所產生的電流源間的mismatch找出來並以數位方式表示,並在最終輸出時做數位校正處理,有效的提升此數位類比轉換器的靜態參數(INL、DNL)與動態參數(SFDR)表現。
Nowadays, the high speed and high resolution data converters (D/A, A/D) play important roles in high performance systems, and we expect higher linearity to achieve high performance. In practice, the nonlinearities always dominate the circuit properties which caused by fabrication, temperature, environments … etc. In general purpose, the current-steering digital to analog converter (DAC) is very popular in high speed applications, but the fabrication variation issues would limit the resolution of the DAC no more than 12 bits. To address this issue, we proposed a foreground calibration method to realize a 14 bit 100MS/s digital to analog converter (DAC).
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079712583
http://hdl.handle.net/11536/44476
Appears in Collections:Thesis