應用於智慧手持式產品之整合電源管理電路

Abstract

便攜性的可持式智慧裝置如今在生活中已經越來越普及，可持式電子產品經常內建不同形式的電源管理積體電路以供應系統電路穩定的電源。以多媒體晶片、消費性電子晶片、系統單晶片與處理器晶片…等積體電路的設計而言，根據晶片內部的各子區塊電路所需的穩壓規格之不同，必須設計多種不同架構的電源管理電路，以供應穩定的電源給各子區塊電路。本論文提出三種不同類型且適用於可持式電子產品之電源管理電路，其中包含低壓降線性穩壓器、單電感多重輸出升壓直流-直流轉換器、雙輸出交換式電容直流–直流轉換器，所設計的電源管理電路透過TSMC 0.35 um與0.18 um CMOS製程下線製作。最後，藉由晶片實際量測去驗證所提出的技術可行性。 於本研究內容的第一個部分，提出一個具高穩定度且負載電流範圍0 mA到100 mA可應用於系統單晶片的穩壓器。在不需要外部電容情況下，快速自我反應迴路能夠加速負載暫態響應使得穩壓器的FOM值達到0.01 ps。由實驗結果證實負載穩壓調節率為75.2 uV/mA而輸入穩壓調節率為1.046 mV/V。完整的低壓降穩壓器晶片僅消耗27 uA靜態電流，而且在100 mA的輸出電流下僅需142 mV的低跨壓值。這裡所提出的快速自我反應迴路能有效地減少暫態所發生的負過衝電壓與正過衝電壓。在無外部電容輔助下，且100 mA步階負載電流的上升時間/下降時間為100 ns時，負載暫態響應所造成的負過衝電壓為38 mV以及正過衝電壓為33 mV。在全負載電流(100 mA)條件下，當1 V步階輸入電壓的邊緣時間為5 us時，輸入電壓暫態響應所造成的負過衝電壓為4 mV以及正過衝電壓為6.5 mV。 本研究內容的第二部分發表一個使用於單電感多輸出直流-直流轉換器的飛輪電荷汞控制設計。藉由飛輪電荷汞控制技術與飛輪切換時間可再度被使用的構想，所設計的轉換器可以額外產生兩組電荷汞輸出而不需要另外消耗時序。所設計轉換器具有脈衝寬度調變控制所產生兩組升壓輸出與電荷汞控制所產生的兩組高於輸入電壓的輸出。轉換器操作於1MHz的切換頻率以及採用1 uH的電感、4.7 uF的電荷汞電容、與33 uF的輸出電容。此轉換器具有較小的交越穩壓調節率而且負載電流最大值可達到70 mA。從實驗結果驗證此直流-直流轉換器搭配單顆電感使用下可以成功地產生四組穩壓輸出。當供應電壓範圍為1.6 V到2.5 V時，經由負載端所得量測的負載穩壓調節率於VO1、VO2、VO3、VO4、各自為0.08 mV/mA、0.05 mV/mA、1.7 mV/mA、1.9 mV/mA。 最後，本論文發表一個使用虛擬三相位-翻轉交叉控制技術與振幅調變機制的無電感雙輸出交換式電容直流–直流轉換器。振幅調變電路會根據不同負載條件去調整電晶體開關的驅動信號振幅大小，以減少切換損失。為了減少輸出漣波、使電荷分佈平均化、及改善負載調節率，所設計的虛擬三相位-翻轉交叉控制電路會連續切換功率電晶體，進而傳遞足夠的電荷至輸出端，在任何切換狀態下的兩組輸出端都至少維持與飛馳電容的連接。在輸入電壓範圍1.7–2V，兩組輸出電壓被穩壓在2.5V和0.8V，兩組輸出最大負載均可達到100 mA的規格。當切換頻率為500 kHz且輸出功率為330 mW時，功率轉換效率達到90.5%。當兩組輸出端各流過100 mA電流時，兩組輸出的峰值漣波電壓各被抑制於26 mV與20 mV。

Smart handheld devices are becoming increasingly common. Different types of power management ICs are often placed within handheld devices to provide the system circuits with stable power. The designs of ICs such as multimedia chips, consumer electronics chips, SOCs, and processor chips require power management circuits with varying structures based on the specifications of the circuits in each subblock. In this dissertation, we proposed three types of power management circuits suitable for handheld electronic products: a capacitor-less LDO regulator, a single-inductor multiple-output boost converter, and a dual-output switched-capacitor DC–DC converter. The proposed designs are implemented using the TSMC 0.35 μm and 0.18 μm CMOS processes. Finally, the chips are measured to verify the feasibility of the proposed techniques. In the first part of this research, the proposed regulator for SoC applications provides high stability for load currents ranging from 0 mA to 100 mA. The fast self-reacting (FSR) loops are capable of accelerating the load transient response while the regulator achieves an FOM of 0.01 ps without the need for an output capacitor. Experimental results demonstrate load regulation of 75.2 uV/mA and line regulation of 1.046 mV/V. The entire LDO chip consumes a quiescent current of 27 uA with an ultra low dropout voltage of 142 mV at a maximum output current of 100 mA. The proposed FSR transient improved loops are capable of efficiently reducing the undershoot and overshoot of the transient voltage. The load transient response without an output capacitor has undershoot of only 38 mV and overshoot of 33 mV for a current step of 100 mA with a 100 ns rise/fall time. With a full load current of 100 mA, the undershoot of the line transient response is 4 mV and the overshoot is 6.5 mV for a 1 V step supply waveform with a 5 us edge time. The second part of this research introduces a freewheel-charge-pump-controlled (FCPC) design for a single-inductor multiple-output (SIMO) DC–DC converter. By applying the FCPC technique, the freewheel switching time is reused, and two extra charge-pump outputs are provided by time recycling, with no cost in time sequences. The converter has two step-up outputs and two charge-pump outputs that can be higher than the input supply. The converter utilizes a 1 uH inductor, 4.7 uF charge-pump capacitors and 33 uF output capacitors at a frequency of 1 MHz. The proposed converter shows low cross-regulation and achieves a maximum loading current of 70 mA. Experimental results demonstrate that the converter successfully generates four well-regulated outputs with a single inductor. The supply voltage ranged from 1.6 V to 2.5 V and the load regulation performance was 0.08 mV/mA, 0.05mV/mA, 1.7 mV/mA, and 1.9 mV/mA for VO1, VO2, VO3 and VO4, respectively. Finally, the third part of this dissertation presents an inductorless dual-output switched-capacitor DC–DC converter employing pseudo-three-phase swap-and-cross control (PTPSCC) and an amplitude modulation mechanism (AMM). The AMM circuit scales the amplitudes of the driving signals for the switches according to the loading conditions in order to minimize switching losses. To reduce output ripples, average charge distribution, and improve load regulation, the PTPSCC circuit continuously switches power transistors to deliver enough charge to the outputs by keeping at least one flying capacitor connected to each output. The two outputs were regulated at 2.5 V and 0.8 V with input ranges of 1.7–2 V. The maximum output loading was 100 mA for both outputs. A power efficiency of 90.5% was achieved at a maximum total output power of 330 mW with a switching frequency of 500 kHz. The maximal peak-to-peak output ripple voltages for the two outputs under 100 mA load currents were suppressed to below 26 mV and 20 mV, respectively.