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dc.contributor.authorWANG, JSen_US
dc.contributor.authorWU, CYen_US
dc.contributor.authorTSAI, MKen_US
dc.date.accessioned2014-12-08T15:05:56Z-
dc.date.available2014-12-08T15:05:56Z-
dc.date.issued1988-12-01en_US
dc.identifier.issn0956-3768en_US
dc.identifier.urihttp://hdl.handle.net/11536/4468-
dc.language.isoen_USen_US
dc.titleLOW-POWER DYNAMIC TERNARY LOGICen_US
dc.typeArticleen_US
dc.identifier.journalIEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMSen_US
dc.citation.volume135en_US
dc.citation.issue6en_US
dc.citation.spage221en_US
dc.citation.epage230en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1988R219800001-
dc.citation.woscount5-
Appears in Collections:Articles