EFFICIENT BIT-LEVEL SYSTOLIC ARRAY IMPLEMENTATION OF FIR AND IIR DIGITAL-FILTERS

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DC 欄位	值	語言
dc.contributor.author	WANG, CL	en_US
dc.contributor.author	WEI, CH	en_US
dc.contributor.author	CHEN, SH	en_US
dc.date.accessioned	2014-12-08T15:06:00Z	-
dc.date.available	2014-12-08T15:06:00Z	-
dc.date.issued	1988-04-01	en_US
dc.identifier.issn	0733-8716	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/49.1916	en_US
dc.identifier.uri	http://hdl.handle.net/11536/4539	-
dc.language.iso	en_US	en_US
dc.title	EFFICIENT BIT-LEVEL SYSTOLIC ARRAY IMPLEMENTATION OF FIR AND IIR DIGITAL-FILTERS	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/49.1916	en_US
dc.identifier.journal	IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS	en_US
dc.citation.volume	6	en_US
dc.citation.issue	3	en_US
dc.citation.spage	484	en_US
dc.citation.epage	493	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	電信工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.contributor.department	Institute of Communications Engineering	en_US
dc.identifier.wosnumber	WOS:A1988M670700005	-
dc.citation.woscount	6	-
顯示於類別：	期刊論文

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