全球定位系統專用低功率整數N頻率合成器

Abstract

本論文中提出一全球定位系統專用的頻率合成器，其工作頻率在1.57GHz，為了達到低功率損耗的目的，我們將操作電壓設定在1.5伏特，且除頻器部份考慮降低電流使用量，採用較省電的整數N組態，所有電路除迴路濾波器及參考振盪器外，均製作在同一晶片上以達高整合目的，晶片製作則是採用台積電CMOS 0.25um製程。 在1.5伏特的電壓供應下，所量測到的功率損耗為14.1毫瓦。壓控振盪器消耗6.8毫瓦，除頻器消耗6.6毫瓦，充電幫浦消耗0.64毫瓦，相位/頻率比較器消耗不到1毫瓦。

In this thesis, we demonstrate a low power synthesizer for global position system (GPS) which operates at 1.57GHz. For low power consumption consideration, we set the supply voltage at 1.5V, and adopt the “Integer-N” type frequency synthesizer to save power. For high integration issue, all circuits are integrated in single chip except the loop filter and the reference oscillator. This chip is fabricated by TSMC 0.25um. The measurement of power consumption is 14.1mW for 1.5V supply voltage. VCO consumes 6.8mW, frequency divider consumes 6.6mW, charge pump consumes 0.64mW, and phase/frequency detector consumes less than 1mW.