用CMOS 0.25µm來完成一個適用藍芽規格具I/Q四相位輸出除整數架構之頻率合成器及探討次諧波混頻器在無線通訊方面的應用

Abstract

本論文包含兩部分工作。第一部分我們實現了一個適用藍芽規格具I/Q四相位輸出除整數架構的頻率合成器。我們先由電路中壓控振盪器設計起，將它設計成能產生四相位輸出。在除頻器部分，我們採用除整數的架構以提供較少的功率消耗為低電流操作考量。 頻率合成器的量測結果如下所列：振盪頻率可調範圍在2392~2514MHz之間，鎖定所需時間約在100µsec，距主頻1MHz遠處之相位雜訊為-102dB/Hz，寄生雜頻較主頻低40dB；使用2.5V電壓源時消耗功率為35.19mA。 第二部分我們介紹了一個主動雙重對稱式的次諧波波混頻器。模擬結果顯示當在RF端灌入5.2MHz的訊號經由混頻在IF輸出端20MHz處可得11dB的電壓增益。混頻器在5.2GHz的IIP3模擬結果為-4dBm，1dB壓縮點在-13dBm。用2.5V的電壓源混頻器電路核心消耗2mA的電流而輸出緩衝器消耗8mA。 電路應用的範圍在無線通訊直接升降頻的收發機上。這兩個設計都是用0.25um CMOS的技術來完成。

This thesis contents two works. First, we implement a fully I/Q Integer-N Frequency Synthesizer for Bluetooth application. We begin from the design of voltage controlled oscillator (VCO), devising it to generate quadrature phase output. In the design of frequency divider part, we adopt integer-N topology which provides a less power consumption for low current use consideration. The measurement results are listed as following: the oscillation frequency is tunable between 2392~2514MHz, locking time is approximately 100μs, phase noise is -102dBc/Hz@1MHz offset, spurious tones are less than carrier 40dB; the power consumption is 35.19mA using a 2.5V power supply. Second, we describe an active double-balance sub-harmonic mixer. The simulated conversion gain at an RF input of 5.2GHz with IF output at 20MHz is 11dB.The mixer has a simulated IIP3 of -4dBm and an input 1dB compression point of -13dBm at 5.2GHz. The mixer core consumes 2mA of current and the output buffers consume 8mA current using a 2.5V power supply. The application areas are in direct conversion transceivers for wireless system. Two designs are all implemented in 0.25µm CMOS technique.