基於關鍵條件萃取之準確熱點偵測演算法

Abstract

隨著製程技術的不斷進展，如今已經進入65奈米以下，微影製程的技術已經跟不上尺寸的微縮，各種解析度增強技術也被發展出來彌補製程的不足，對於容易受製程影響而造成電路有缺陷的hotspots，如果能在電路設計時避免產生此種模型，則可以改善此問題，此問題一般稱為pattern matching。 本篇論文提出模型拓樸分析演算法來解決此問題，藉由分析hotspots的拓樸關係，並且將重要的拓樸特性轉成DRC rules，利用DRC Checker幫助我們做第一階段的Pre-filtering可以找出hotspots的潛在位置，再對這些位置做進一步的exact pattern matching，經由我們的演算法，可以有效率並且準確的找出所有hotspots的位置，這些位置可以回報給設計者做修正已改善電路的良率。

As technology for lithography beyond 65nm, the IC industry faces challenge in reliability. Many resolution enhancement technologies (RETs) have been developed to improve yield and reliability. For these patterns which are susceptible to lithography process, if designer can avoid generate them, it can improve this problem. In general, this problem is called “pattern matching”. In this thesis, we propose a DRC based topological analysis algorithm. By analyzing topological relation of this pattern, we can convert topological properties to DRC rules. Then, these rules apply to DRC checker to pre-filter the potential positions of patterns. Finally, we will do exact pattern matching to these potential positions. By our algorithm, we can efficiently and accurately to identify all the positions of hotspots. These positions will be reported to designer to correct the layout for improving yield.