適用於IEEE 802.11n之使用訊雜比資訊之低密度同位檢查碼解碼器

Abstract

這篇論文中，我們實現了一種為了IEEE 802.11n下碼率為1/2以及碼長為648位元的解碼器架構。為了減少面積，我們用了部分平行的方法。我們使用了最小值-總和-正確項(Min-Sum-Correct)演算法加上訊雜比資訊來改善誤碼率。也簡化了使用訊雜比資訊所需要用到的乘法器的複雜度。我們也換了Check Node更新還有Bit Node更新的順序來簡化硬體複雜度，並且可以在第一次疊代完以後決定是否中斷演算法的運算。這個低密度同位檢查碼解碼器可以實37~319Mbps的吞吐量以及有5.3mm2的面積，平均消耗功率為145mW。

In this thesis, we implemented an architecture of LDPC decoder for IEEE 802.11n with code rate is 1/2 and code length is 648. In order to reduce the area, we use partial parallel method. We use the SNR information with Min-Sum-Correct algorithm to improve the BER performance. And make the complexity of multiplier needed for SNR information lower. We also reorder the CNU and BNU so that the hardware complexity can be reduced, and there is a chance to early terminate the LDPC process at the first iteration. The proposed LDPC decoder can achieve 37~ 319Mbps with the total area being 5.3mm2 and the average power being 244mW.