標題: 整合電力線通訊與電力驅動之汽車電子晶片
Integrated Power Line Communication and Power Driver for Automobile Applications
作者: 黃順煜
Huang, Shun-Yu
蘇朝琴
Su, Chau-Chin
電控工程研究所
關鍵字: 電力線通訊;時脈資料回復電路;直接序列展頻;車用電子;馬達驅動;脈波寬度調變;power-line communication (PLC);clock-and-data recovery (CDR);direct sequence spread spectrum (DSSS);automotive electronics;motor driver;pulse-width modulation (PWM)
公開日期: 2011
摘要: 本論文提出一個整合電力通訊與電力驅動之汽車電子晶片,將電力線通訊和車用電子結合在一起。此晶片可取代四條通訊線,直觀的想法就是剩下了四分之一的成本。為了抵抗外界的雜訊使用直接序列展頻技術對資料做編碼傳送到直流的電力線,使用巴克碼編碼後的速率為8.33 Mbps,資料速率為757.57 Kbps。藉由巴克碼的相關性設計出時脈資料回復器,將資料回復後,傳送到後端的控制電路產生脈波寬度控制訊號。利用高壓製程的功率電晶體以單一電壓 (12V) 提供多樣化汽車電器所需之電流大小與驅動曲線。整體系統為使用FPGA實現的傳送端,透過耦合電路送進電力線,晶片接收後驅動外部的LED和馬達。此晶片使用台積電0.25微米製程完成。
The thesis proposes an integrated communication (PLC) and power driver for the automobile application. With a chip, we can replace the four communication lines. For the background noise, the direct sequence spread spectrum (DSSS) technology is used on a power line of DC 12V. The chip rate is 8.33 Mbps and data rate is 757.57 Kbps for coding by Barker code. We design the CDR by using Barker code’s correlation. The pulse-width modulator is controlled by the received signal. Most of the electrical components in an automobile can be driven by the power MOS. The overall system includes the transmitter, which uses FPGA to realize, and the receiver. Through an AC-coupling circuit, TX can send signals to the power line, and the received signals in RX are used to drive the LED and the motor. The chip is realized in tsmc 0.25 um process.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079812581
http://hdl.handle.net/11536/46937
Appears in Collections:Thesis